Abstract: A marking beam of electromagnetic energy is generated within a printing device and a visibly markable portion of a replaceable subsystem that is at least partially arranged within the printing device is altered by illuminating at least part of the markable portion with the marking beam.

Abstract: Systems for translating voltage levels of digital signals are provided. An exemplary system comprises a circuit board operative to use a first digital signal and a second digital signal. The first digital signal operates between a first voltage and a second voltage, with the first voltage corresponding to a logic 0 and the second voltage corresponding to a logic 1. The second digital signal operates between a third voltage and a fourth voltage, with the third voltage and the fourth voltage exhibiting an average value, the absolute value of which is at least an order of magnitude different than an average value of the first voltage and the second voltage. The circuit board is further operative to use the first digital signal to produce the second digital signal. Methods and other systems also are provided.

Abstract: Memory storage devices that employ atomic resolution storage technology are provided. A preferred memory storage device includes a storage medium that defines one or more coverage areas. Each of the coverage areas incorporates a storage area that is configurable in one of a plurality of structural states. Typically, the structural states represent information stored in the storage area. Electron beam emitters electrically communicate with the storage medium, with the storage medium and the emitters being configured to move relative to each other. So configured, each emitter is capable of providing a beam of electrons to a respective one of the coverage areas. The memory storage device also includes a first current source that selectively electrically communicates with at least one of the emitters. Additionally, a control system electrically communicates with the first current source that facilitates a controlled current flow from the first current source to the at least one emitter.

Abstract: Memory storage devices that employ atomic resolution storage technology are provided. A preferred memory storage device includes a storage medium that defines one or more coverage areas. Each of the coverage areas incorporates a storage area that is configurable in one of a plurality of structural states. Typically, the structural states represent information stored in the storage area. Electron beam emitters electrically communicate with the storage medium, with the storage medium and the emitters being configured to move relative to each other. So configured, each emitter is capable of providing a beam of electrons to a respective one of the coverage areas. The memory storage device also includes a first current source that selectively electrically communicates with at least one of the emitters. Additionally, a control system electrically communicates with the first current source that facilitates a controlled current flow from the first current source to the at least one emitter.

Abstract: In accordance with the present invention, a magneto-resistive head read amplifier circuit is provided which can be incorporated into a magnetic reader for reading information stored in magnetic form on a storage medium. The magneto-resistive head read amplifier of the present invention incorporates an inductor in the bottom current drain of the head read amplifier circuit which reduces or eliminates noise generated by the bottom current source transistor of the head read amplifier circuit. In accordance with a first embodiment of the present invention, the magneto-resistive head read amplifier is a single-polarity head read amplifier circuit which utilizes a bias current having a particular polarity. In accordance with a second embodiment of the present invention, the magneto-resistive head read amplifier is a dual-polarity head read amplifier circuit capable of operating with bias currents of opposite polarity.

Abstract: A data recording system includes media such as a magnetic disk or tape, a read/write head assembly, and a circuit that provides a write signal having edge placement equalization. The circuit responds to a binary serial data signal such as a run length limited signal of the type (1,x) and provides a write signal having data transitions corresponding to one of the two binary data values, the absence of a transition corresponding to the other data value. In addition, the write signal is provided with a pair of equalization transitions during periods of no data transitions. A first data transition is shifted away from the last provided equalization transition by a predetermined offset. A second data transition, provided immediately after the first data transition, may be shifted toward the last provided equalization transition. Timing of the data transitions is derived from a clock used to provide the equalization transitions.