Patents by Inventor Michael C. Gariazzo

Michael C. Gariazzo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4246571
    Abstract: A system for digitally quantizing, at high resolution, relatively small vations of an analog input signal. Initially, a reference level signal having a preselected value close to the average magnitude of the analog signal being quantized is compared with the analog input signal. The difference between these two signals is amplified and then analog to digital converted. By an iterative process, the reference level is adjusted as necessary to closely track the gross magnitude level of the analog input signal. Analog to digital conversion is applied only to the small difference signal, thereby allowing quantization to occur with high resolution. The system automatically keeps track of gross signal excursions so that the magnitude of the quantized signals is also available to the user.
    Type: Grant
    Filed: March 23, 1978
    Date of Patent: January 20, 1981
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Michael C. Gariazzo
  • Patent number: 4133044
    Abstract: Disclosed is a plurality of parallel resistive-capacitive clamping circuits ndividually coupling the bit "input" and bit "output" terminals of a multi-bit, serial/parallel (S/P), synchronous/asynchronous (S/A) shift register (e.g., CD-4034A). The clamping circuits provide the contents of the shift register with an increased immunity from the effects of transients, radiation, and temporary power failures.
    Type: Grant
    Filed: February 28, 1978
    Date of Patent: January 2, 1979
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Michael C. Gariazzo, Leonard S. Haynes
  • Patent number: 4003083
    Abstract: An economical system for both recording multiplexed digital data on a tape recorder and decoding the stored data.
    Type: Grant
    Filed: April 15, 1975
    Date of Patent: January 11, 1977
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Michael C. Gariazzo
  • Patent number: 3988670
    Abstract: Automatic testing of digital sequential logical devices employing a read y memory programmed with a series of inputs. The read only memory programmed outputs are then compared in EXCLUSIVE OR gates with the outputs of the device under test.
    Type: Grant
    Filed: April 15, 1975
    Date of Patent: October 26, 1976
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Michael C. Gariazzo
  • Patent number: 3979580
    Abstract: A solid state electronic circuit designed to accept coded information to trol the function of a mine mechanism.
    Type: Grant
    Filed: April 15, 1975
    Date of Patent: September 7, 1976
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Thomas W. Crilly, Michael C. Gariazzo