Patents by Inventor Michael C. Hamilton

Michael C. Hamilton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240396194
    Abstract: A microwave filter includes a multilayer stack. The multilayer stack includes one or more first-type layers composed of a first superconductor material having a first superconducting critical temperature; and one or more second-type layers composed of a non-superconductor metal or a second superconductor material having a second superconducting critical temperature that is lower than the first superconducting critical temperature. The multilayer stack is configured to behave as a dissipative metal for photons having a frequency above twice a superconducting gap frequency of the multilayer stack and to behave as a superconductor for photons having a frequency below twice the superconducting gap frequency of the multilayer stack.
    Type: Application
    Filed: May 26, 2023
    Publication date: November 28, 2024
    Inventors: George Earl Grant Sterling, Michael C. Hamilton, Lev Ioffe, Charles Neill
  • Patent number: 12123845
    Abstract: In at least one illustrative embodiment, a field-effect transistor biosensor for detection of a pathogen includes a substrate and a channel formed from a two-dimensional monolayer or few-layer metal chalcogenide that is functionalized with a biorecognition element. The biorecognition element may be an antibody, such as an antibody for the SARS-CoV-2 spike protein. A method for manufacturing the biosensor includes depositing an amorphous two-dimensional material on the substrate with pulsed laser ablation, crystallizing the amorphous two-dimensional material to generate a two-dimensional monolayer coupled to the substrate, and activating a surface of the two-dimensional material with the biorecognition element after crystallizing the amorphous two-dimensional material. The composition of the two-dimensional material may be tuned. The substrate may be photolithographically patterned. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: October 22, 2024
    Assignees: AUBURN UNIVERSITY, MERCER UNIVERSITY
    Inventors: Masoud Mahjouri-Samani, Michael C. Hamilton, Marcelo Kuroda, Sahar Hasim, Parvin Fathi-Hafshejani
  • Patent number: 12027630
    Abstract: A thin-film transistor comprises an annealed layer comprising crystalline zinc oxide. A passivation layer is adjacent to the thin-film transistor. The passivation layer has a thickness and material composition such that when a dose of radiation from a radiation source irradiates the thin-film transistor, a portion of the dose that includes an approximate maximum concentration of the dose is located within the annealed layer. The annealed layer has a thickness and threshold displacement energies after it has been annealed such that: a) a difference between a transfer characteristic value of the thin-film transistor before and after the dose is less than a first threshold; and b) a difference between a transistor output characteristic value of the thin-film before and after the dose is less than a second threshold. The thresholds are based on a desired performance of the thin-film transistor.
    Type: Grant
    Filed: May 11, 2023
    Date of Patent: July 2, 2024
    Assignee: Auburn University
    Inventors: Minseo Park, Michael C. Hamilton, Shiqiang Wang, Kosala Yapa Bandara
  • Publication number: 20240194661
    Abstract: A method includes providing a first chip having a circuit element layer stack, the circuit element layer stack including a plurality of circuit elements distributed across a plurality of layers. The circuit element layer stack has a sacrificial material filling a space between the plurality of circuit elements in the plurality of layers and a coherent device layer disposed on the circuit element layer stack. The method includes removing the sacrificial material.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 13, 2024
    Inventors: Zhimin Jamie Yao, Michael C. Hamilton, Marissa Giustina, Brian James Burkett, Theodore Charles White, Ofer Naaman
  • Publication number: 20240194532
    Abstract: A method includes providing a first chip having a circuit element layer stack, the circuit element layer stack including a plurality of circuit elements distributed across a plurality of layers. The circuit element layer stack has a sacrificial material filling a space between the plurality of circuit elements in the plurality of layers and a coherent device layer disposed on the circuit element layer stack. The method includes removing the sacrificial material.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 13, 2024
    Inventors: Zhimin Jamie Yao, Michael C. Hamilton, Marissa Giustina, Brian James Burkett, Theodore Charles White, Ofer Naaman
  • Publication number: 20240038897
    Abstract: A thin-film transistor comprises an annealed layer comprising crystalline zinc oxide. A passivation layer is adjacent to the thin-film transistor. The passivation layer has a thickness and material composition such that when a dose of radiation from a radiation source irradiates the thin-film transistor, a portion of the dose that includes an approximate maximum concentration of the dose is located within the annealed layer. The annealed layer has a thickness and threshold displacement energies after it has been annealed such that: a) a difference between a transfer characteristic value of the thin-film transistor before and after the dose is less than a first threshold; and b) a difference between a transistor output characteristic value of the thin-film before and after the dose is less than a second threshold. The thresholds are based on a desired performance of the thin-film transistor.
    Type: Application
    Filed: May 11, 2023
    Publication date: February 1, 2024
    Inventors: Minseo Park, Michael C. Hamilton, Shiqiang Wang, Kosala Yapa Bandara
  • Patent number: 11682734
    Abstract: A thin-film transistor comprises an annealed layer comprising crystalline zinc oxide. A passivation layer is adjacent to the thin-film transistor. The passivation layer has a thickness and material composition such that when a dose of radiation from a radiation source irradiates the thin-film transistor, a portion of the dose that includes an approximate maximum concentration of the dose is located within the annealed layer. The annealed layer has a thickness and threshold displacement energies after it has been annealed such that: a) a difference between a transfer characteristic value of the thin-film transistor before and after the dose is less than a first threshold; and b) a difference between a transistor output characteristic value of the thin-film before and after the dose is less than a second threshold. The thresholds are based on a desired performance of the thin-film transistor.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: June 20, 2023
    Assignee: Auburn University
    Inventors: Minseo Park, Michael C. Hamilton, Shiqiang Wang, Kosala Yapa Bandara
  • Publication number: 20220146451
    Abstract: In at least one illustrative embodiment, a field-effect transistor biosensor for detection of a pathogen includes a substrate and a channel formed from a two-dimensional monolayer or few-layer metal chalcogenide that is functionalized with a biorecognition element. The biorecognition element may be an antibody, such as an antibody for the SARS-CoV-2 spike protein. A method for manufacturing the biosensor includes depositing an amorphous two-dimensional material on the substrate with pulsed laser ablation, crystallizing the amorphous two-dimensional material to generate a two-dimensional monolayer coupled to the substrate, and activating a surface of the two-dimensional material with the biorecognition element after crystallizing the amorphous two-dimensional material. The composition of the two-dimensional material may be tuned. The substrate may be photolithographically patterned. Other embodiments are described and claimed.
    Type: Application
    Filed: November 9, 2021
    Publication date: May 12, 2022
    Inventors: MASOUD MAHJOURI-SAMANI, MICHAEL C. HAMILTON, MARCELO KURODA, SAHAR HASIM, PARVIN FATHI-HAFSHEJANI
  • Publication number: 20210343868
    Abstract: A thin-film transistor comprises an annealed layer comprising crystalline zinc oxide. A passivation layer is adjacent to the thin-film transistor. The passivation layer has a thickness and material composition such that when a dose of radiation from a radiation source irradiates the thin-film transistor, a portion of the dose that includes an approximate maximum concentration of the dose is located within the annealed layer. The annealed layer has a thickness and threshold displacement energies after it has been annealed such that: a) a difference between a transfer characteristic value of the thin-film transistor before and after the dose is less than a first threshold; and b) a difference between a transistor output characteristic value of the thin-film before and after the dose is less than a second threshold. The thresholds are based on a desired performance of the thin-film transistor.
    Type: Application
    Filed: June 14, 2021
    Publication date: November 4, 2021
    Inventors: Minseo Park, Michael C. Hamilton, Shiqiang Wang, Kosala Yapa Bandara
  • Patent number: 11069815
    Abstract: A thin-film transistor comprises an annealed layer comprising crystalline zinc oxide. A passivation layer is adjacent to the thin-film transistor. The passivation layer has a thickness and material composition such that when a dose of radiation from a radiation source irradiates the thin-film transistor, a portion of the dose that includes an approximate maximum concentration of the dose is located within the annealed layer. The annealed layer has a thickness and threshold displacement energies after it has been annealed such that: a) a difference between a transfer characteristic value of the thin-film transistor before and after the dose is less than a first threshold; and b) a difference between a transistor output characteristic value of the thin-film before and after the dose is less than a second threshold. The thresholds are based on a desired performance of the thin-film transistor.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: July 20, 2021
    Assignee: Auburn University
    Inventors: Minseo Park, Michael C. Hamilton, Shiqiang Wang, Kosala Yapa Bandara
  • Patent number: 10879906
    Abstract: A quantum charge parametron (QCP) includes a load capacitor; two quantum phase-slip junctions (QPSJs) coupled to each other through the load capacitor so as to define two charge islands, each charge island being located between the load capacitor and a respective one of the two QPSJs; at least one input voltage source coupled to the two QPSJs so that the two QPSJs, the load capacitor and the at least one input voltage source define a loop; and an excitation voltage source coupled to the two charge islands through first and second capacitors, respectively.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: December 29, 2020
    Assignee: AUBURN UNIVERSITY
    Inventors: Michael C. Hamilton, Uday S. Goteti
  • Publication number: 20200227618
    Abstract: One or more dielectric barriers, such as, but not limited to, aluminum oxide (Al2O3), is used to isolate and protect super conductive (SC) structures. The SC structures are formed from SC materials, such as, but not limited to, niobium, from other surrounding materials. Using the barriers significantly reduces and/or eliminates the degradation of the superconducting properties of the SC structures during subsequent fabrication steps that employ elevated temperatures. As a result, incorporation of the barriers relaxes the need to use lower temperature fabrication processes and opens up possibilities for use of different more desirable processes and/or materials during subsequent fabrication steps.
    Type: Application
    Filed: January 14, 2019
    Publication date: July 16, 2020
    Inventors: Michael C. HAMILTON, Vaibhav GUPTA, Mark Lee ADAMS
  • Patent number: 10637479
    Abstract: A superconducting circuit device includes one or more JJs and one or more QPSJs. The one or more QPSJs are adapted for receiving at least one input and responsively providing at least one output. Each QPSJ is configured such that when an input voltage of an input voltage pulse exceeds a critical value, a quantized charge of a Cooper electron pair tunnels across said QPSJ as an output, when the input voltage is less than the critical value, no quantized charge of the Cooper electron pair tunnels across said QPSJ as the output, wherein the presence and absence of the quantized charge that is realizable as a constant area of current pulses in the output form two logic states, and wherein the at least one QPSJ is biased with a bias voltage. The superconducting circuit device may include one or more JJs.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: April 28, 2020
    Assignee: AUBURN UNIVERSITY
    Inventors: Michael C. Hamilton, Uday S. Goteti
  • Publication number: 20200119737
    Abstract: A quantum charge parametron (QCP) includes a load capacitor; two quantum phase-slip junctions (QPSJs) coupled to each other through the load capacitor so as to define two charge islands, each charge island being located between the load capacitor and a respective one of the two QPSJs; at least one input voltage source coupled to the two QPSJs so that the two QPSJs, the load capacitor and the at least one input voltage source define a loop; and an excitation voltage source coupled to the two charge islands through first and second capacitors, respectively.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 16, 2020
    Inventors: Michael C. Hamilton, Uday S. Goteti
  • Publication number: 20200027989
    Abstract: A thin-film transistor comprises an annealed layer comprising crystalline zinc oxide. A passivation layer is adjacent to the thin-film transistor. The passivation layer has a thickness and material composition such that when a dose of radiation from a radiation source irradiates the thin-film transistor, a portion of the dose that includes an approximate maximum concentration of the dose is located within the annealed layer. The annealed layer has a thickness and threshold displacement energies after it has been annealed such that: a) a difference between a transfer characteristic value of the thin-film transistor before and after the dose is less than a first threshold; and b) a difference between a transistor output characteristic value of the thin-film before and after the dose is less than a second threshold. The thresholds are based on a desired performance of the thin-film transistor.
    Type: Application
    Filed: June 28, 2019
    Publication date: January 23, 2020
    Inventors: Minseo Park, Michael C. Hamilton, Shiqiang Wang, Kosala Yapa Bandara
  • Patent number: 10425706
    Abstract: The present invention provides a mixed analog and digital chip-scale reconfigurable WDM network. The network suitably includes a router that enables rapidly configurable wavelength selective routers of fiber optic data. The router suitably incorporates photonic wavelength selective optical add/drop filters and multiplexers.
    Type: Grant
    Filed: February 20, 2011
    Date of Patent: September 24, 2019
    Assignee: The Boeing Company
    Inventors: William P. Krug, Harold Hager, Michael C. Hamilton, Axel Scherer
  • Publication number: 20180294815
    Abstract: A superconducting circuit device includes one or more JJs and one or more QPSJs. The one or more QPSJs are adapted for receiving at least one input and responsively providing at least one output. Each QPSJ is configured such that when an input voltage of an input voltage pulse exceeds a critical value, a quantized charge of a Cooper electron pair tunnels across said QPSJ as an output, when the input voltage is less than the critical value, no quantized charge of the Cooper electron pair tunnels across said QPSJ as the output, wherein the presence and absence of the quantized charge that is realizable as a constant area of current pulses in the output form two logic states, and wherein the at least one QPSJ is biased with a bias voltage. The superconducting circuit device may include one or more JJs.
    Type: Application
    Filed: June 5, 2018
    Publication date: October 11, 2018
    Inventors: Michael C. Hamilton, Uday S. Goteti
  • Patent number: 9998122
    Abstract: A superconducting logic cell includes at least one quantum phase-slip junction (QPSJ) for receiving at least one input and responsively providing at least one output, each QPSJ being configured such that when an input voltage of an input voltage pulse exceeds a critical value, a quantized charge of a Cooper electron pair tunnels across said QPSJ as an output, when the input voltage is less than the critical value, no quantized charge of the Cooper electron pair tunnels across said QPSJ as the output, where the presence and absence of the quantized charge in the form of a constant area current pulse in the output form two logic states, and the at least one QPSJ is biased with a bias voltage. The superconducting logic cell further includes at least one Josephson junction (JJ) coupled with the at least one QPSJ to perform one or more logic operations.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: June 12, 2018
    Assignee: AUBURN UNIVERSITY
    Inventors: Michael C. Hamilton, Uday S. Goteti
  • Publication number: 20170359072
    Abstract: A superconducting logic cell includes at least one quantum phase-slip junction (QPSJ) for receiving at least one input and responsively providing at least one output, each QPSJ being configured such that when an input voltage of an input voltage pulse exceeds a critical value, a quantized charge of a Cooper electron pair tunnels across said QPSJ as an output, when the input voltage is less than the critical value, no quantized charge of the Cooper electron pair tunnels across said QPSJ as the output, where the presence and absence of the quantized charge in the form of a constant area current pulse in the output form two logic states, and the at least one QPSJ is biased with a bias voltage. The superconducting logic cell further includes at least one Josephson junction (JJ) coupled with the at least one QPSJ to perform one or more logic operations.
    Type: Application
    Filed: June 8, 2017
    Publication date: December 14, 2017
    Inventors: Michael C. Hamilton, Uday S. Goteti
  • Publication number: 20120251107
    Abstract: The present invention provides a mixed analog and digital chip-scale reconfigurable WDM network. The network suitably includes a router that enables rapidly configurable wavelength selective routers of fiber optic data. The router suitably incorporates photonic wavelength selective optical add/drop filters and multiplexers.
    Type: Application
    Filed: February 20, 2011
    Publication date: October 4, 2012
    Inventors: William P. Krug, Harold Hager, Michael C. Hamilton, Axel Scherer