Abstract: An monolithic integrated circuit comprising a transistor-inductor structure is provided having simultaneously noise matched and input impedance matched characteristics at a desired frequency. The transistor-inductor structure comprises a first transistor Q.sub.1 which may be a common emitter bipolar transistor or common source MOSFET transistor Q.sub.1, a second optional transistor Q.sub.2, a first inductor L.sub.E in the emitter (source) of Q.sub.1, and a second inductor L.sub.B in the base (gate) of Q1. The emitter length l.sub.E1, or correspondingly the gate width w.sub.g, of Q1 is designed such that the real part of its optimum noise impedance is equal to the characteristic impedance of the system, Z.sub.0, which is typically 50.OMEGA.. The first inductor L.sub.E, provides matching of the real part of the input impedance and the second inductor L.sub.B cancels out the noise reactance and input impedance reactance of the structure.

Abstract: An monolithic integrated circuit comprising a transistor-inductor structure is provided having simultaneously noise matched and input impedance matched characteristics at a desired frequency. The transistor-inductor structure comprises a first transistor Q.sub.1 which may be a common emitter bipolar transistor or common source MOSFET transistor Q.sub.1, a second optional transistor Q.sub.2, a first inductor L.sub.E in the emitter (source) of Q.sub.1, and a second inductor L.sub.B in the base (gate) of Q1. The emitter length l.sub.E1, or correspondingly the gate width w.sub.g, of Q1 is designed such that the real part of its optimum noise impedance is equal to the characteristic impedance of the system, Z.sub.0, which is typically 50.OMEGA.. The first inductor L.sub.E, provides matching of the real part of the input impedance and the second inductor L.sub.B cancels out the noise reactance and input impedance reactance of the structure.