Abstract: A method for collaboration using digital notes. A facilitator starts a session during a video conferencing with participants and can share a screen with the participants. The screen displays a code, a session ID, and a link. Participants join the session by scanning the code with a camera, entering the session ID, or accessing the link. During the session, the participants can create digital notes or scan physical notes to have them converted to digital notes. The facilitator then receives the digital notes sent from the participants during the session and moves the digital notes to a group on the facilitator's screen. Since the facilitator's screen is shared with the participants, any participant can view the digital notes in the group from all of the participants for collaboration as controlled by the facilitator.

Abstract: A continuous glucose monitoring system may utilize externally sourced information regarding the physiological state and ambient environment of its user for externally calibrating sensor glucose measurements. Externally sourced factory calibration information may be utilized, where the information is generated by comparing metrics obtained from the data used to generate the sensor's glucose sensing algorithm to similar data obtained from each batch of sensors to be used with the algorithm in the future. The output sensor glucose value of a glucose sensor may also be estimated by analytically optimizing input sensor signals to accurately correct for changes in sensitivity, run-in time, glucose current dips, and other variable sensor wear effects.

Abstract: A display may have a pixel array such as a liquid crystal pixel array. The pixel array may be illuminated with backlight illumination from a direct-lit backlight unit. The backlight unit may include an array of light-emitting diodes (LEDs) on a printed circuit board. The display may have a notch to accommodate an input-output component. Reflective layers may be included in the notch. The backlight may include a color conversion layer with a property that varies as a function of position. The light-emitting diodes may be covered by a slab of encapsulant with recesses in an upper surface.

Abstract: A stacked processor-plus-memory device includes a processing die with an array of processing elements of an artificial neural network. Each processing element multiplies a first operand—e.g. a weight—by a second operand to produce a partial result to a subsequent processing element. To prepare for these computations, a sequencer loads the weights into the processing elements as a sequence of operands that step through the processing elements, each operand stored in the corresponding processing element. The operands can be sequenced directly from memory to the processing elements or can be stored first in cache. The processing elements include streaming logic that disregards interruptions in the stream of operands.

Abstract: Row hammer is mitigated by issuing, to a memory device, mitigation operation (MOP) commands in order to cause the refresh of rows at a specified vicinity of a suspected aggressor row. These mitigation operation commands are each associated with respective row addresses that indicate the suspected aggressor row and an indicator of which neighbor row in the vicinity of the suspected aggressor row is to be refreshed. The mitigation operation commands are issued in response to a fixed number of activate commands. The suspected aggressor row is selected by randomly choosing, with equal probability, one of the N previous activate commands to supply its associated row address as the suspected aggressor row address. The neighbor row may be selected randomly with a probability that diminishes inversely with the distance between the suspected aggressor row and the neighbor row.

Abstract: An integrated circuit (IC) memory device includes an array of storage cells configured into multiple banks. Interface circuitry receives refresh commands from a host memory controller to refresh the multiple banks for a first refresh mode. On-die refresh control circuitry selectively generates local refresh commands to refresh the multiple banks in cooperation with the host memory controller during a designated hidden refresh interval in a second refresh mode. Mode register circuitry stores a value indicating whether the on-die refresh control circuitry is enabled for use during the second refresh mode. The interface circuitry includes backchannel control circuitry to transmit a corrective action control signal during operation in the second refresh mode.

Abstract: A high-capacity cache memory is implemented by multiple heterogenous DRAM dies, including a dedicated tag-storage DRAM die architected for low-latency tag-address retrieval and thus rapid hit/miss determination, and one or more capacity-optimized cache-line DRAM dies that render a net cache-line storage capacity orders of magnitude beyond that of state-of-the art SRAM cache implementations. The tag-storage die serves double-duty in some implementations, yielding rapid tag hit/miss determination for cache-line read/write requests while also serving as a high-capacity snoop-filter in a memory-sharing multiprocessor environment.

Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including initiating a read operation with respect to a block of the memory device, selecting, based on a set of criteria, a default read offset from a set of read offsets, wherein the set of criteria includes at least one of: a parameter related to trigger rate, or an amount of time that an open block is allowed to remain open to control threshold voltage shift due to storage charge loss, and applying the default read offset to a read operation performed with respect to the block.

Abstract: An interconnected stack of one or more Dynamic Random Access Memory (DRAM) die has a base logic die and one or more custom logic or processor die. The processor logic die snoops commands sent to and through the stack. In particular, the processor logic die may snoop mode setting commands (e.g., mode register set—MRS commands). At least one mode setting command that is ignored by the DRAM in the stack is used to communicate a command to the processor logic die. In response the processor logic die may prevent commands, addresses, and data from reaching the DRAM die(s). This enables the processor logic die to send commands/addresses and communicate data with the DRAM die(s). While being able to send commands/addresses and communicate data with the DRAM die(s), the processor logic die may execute software using the DRAM die(s) for program and/or data storage and retrieval.

Abstract: Provided herein, inter alia, are engineered antibodies or antigen-binding fragments thereof that exhibit one or more improved properties relating to manufacturability, thermostability, and/or protease resistance as well as methods for making and using the same.

Abstract: The invention features compositions and methods for the increased production of mevalonate, isoprene, isoprenoid precursor molecules, isoprenoids, and/or acetyl-CoA-derived products in recombinant microorganisms by engineering the microorganisms to comprise one or more acetylating proteins such that the expression and/or activity of the one or more acetylating proteins is modulated.

Abstract: Provided herein, inter alia, are fusion DNA constructs comprising improved protease recognition sequences for expressing and purifying one or more polypeptides of interest as well as methods for producing one or more polypeptides of interest in a recombinant host cell.

Abstract: Disclosed herein, inter alia, are cleavage-resistant antibodies and antibody-producing host cells as well as methods for making, using, and improving secretion of the same.

Abstract: The invention features compositions and methods for the increased production of mevalonate, isoprene, isoprenoid precursor molecules, and/or isoprenoids in microorganisms by engineering a microorganism for increased carbon flux towards mevalonate production in the following enzymatic pathways: (a) citrate synthase, (b) phosphotransacetylase, (c) acetate kinase, (d) lactate dehydrogenase, (e) malic enzyme, and (f) pyruvate dehydrogenase such that one of more of the enzyme activity is modulated. In addition, production of mevalonate, isoprene, isoprenoid precursor molecules, and/or isoprenoids can be further enhanced by the heterologous expression of the mvaE and mvaS genes (such as, but not limited to, mvaE and mvaS genes from the organisms Listeria grayi DSM 20601, Enterococcus faecium, Enterococcus gallinarum EG2, and Enterococcus casseliflavus).

Abstract: The invention features compositions and methods for the increased production of mevalonate, isoprene, isoprenoid precursor molecules, isoprenoids, and/or acetyl-CoA-derived products in recombinant microorganisms by engineering the microorganisms to comprise one or more acetylating proteins such that the expression and/or activity of the one or more acetylating proteins is modulated.

Abstract: The invention features methods for producing isoprene from cultured cells wherein the cells in the stationary phase. The invention also provides compositions that include these cultured cells and/or increased amount of isoprene. The invention also provides for systems that include a non-flammable concentration of isoprene in the gas phase. Additionally, the invention provides isoprene compositions, such as compositions with increased amount of isoprene or increased purity.

Abstract: The invention features compositions and methods for the increased production of mevalonate, isoprene, isoprenoid precursor molecules, isoprenoids, and/or acetyl-CoA-derived products in recombinant microorganisms by engineering the microorganisms to comprise one or more acetylating proteins such that the expression and/or activity of the one or more acetylating proteins is modulated.

Abstract: The invention features compositions and methods for the increased production of mevalonate, isoprene, isoprenoid precursor molecules, and/or isoprenoids in microorganisms via the heterologous expression of the mvaE and mvaS genes from the organisms Listeria grayi DSM 20601, Enterococcus faecium, Enterococcus gallinarum EG2, and Enterococcus casseliflavus.

Abstract: The invention features compositions and methods for the increased production of mevalonate, isoprene, isoprenoid precursor molecules, and/or isoprenoids in microorganisms by engineering a microorganism for increased carbon flux towards mevalonate production in the following enzymatic pathways: (a) citrate synthase, (b) phosphotransacetylase, (c) acetate kinase, (d) lactate dehydrogenase, (e) malic enzyme, and (f) pyruvate dehydrogenase such that one of more of the enzyme activity is modulated. In addition, production of mevalonate, isoprene, isoprenoid precursor molecules, and/or isoprenoids can be further enhanced by the heterologous expression of the mvaE and mvaS genes (such as, but not limited to, mvaE and mvaS genes from the organisms Listeria grayi DSM 20601, Enterococcus faecium, Enterococcus gallinarum EG2, and Enterococcus casseliflavus).

Abstract: The invention features compositions and methods for the increased production of mevalonate, isoprene, isoprenoid precursor molecules, and/or isoprenoids in microorganisms by engineering a microorganism for increased carbon flux towards mevalonate production in the following enzymatic pathways: (a) citrate synthase, (b) phosphotransacetylase, (c) acetate kinase, (d) lactate dehydrogenase, (e) malic enzyme, and (f) pyruvate dehydrogenase such that one of more of the enzyme activity is modulated. In addition, production of mevalonate, isoprene, isoprenoid precursor molecules, and/or isoprenoids can be further enhanced by the heterologous expression of the mvaE and mvaS genes (such as, but not limited to, mvaE and mvaS genes from the organisms Listeria grayi DSM 20601, Enterococcus faecium, Enterococcus gallinarum EG2, and Enterococcus casseliflavus).