Abstract: A compact disk drive controller to control the access of information from an optical compact disk (CD) digital data storage device by a host computer using an integrated drive electronics (IDE) data bus or an industry standard architecture (ISA) data bus is disclosed. A digital signal processor (DSP) interface to the drive electronics of the CD drive, a dynamic random access memory (DRAM) controller, an error correction code (ECC) data corrector, an error detection and correction (EDC) device employing cyclical redundancy checking techniques (EDC/CRC), and a host computer interface are described.

Abstract: A compact disk drive controller to control the access of information from an optical compact disk (CD) digital data storage device by a host computer using an integrated drive electronics (IDE) data bus or an industry standard architecture (ISA) data bus is disclosed. A digital signal processor (DSP) interface to the drive electronics of the CD drive, a dynamic random access memory (DRAM) controller, an error correction code (ECC) data corrector, an error detection and correction (EDC) device employing cyclical redundancy checking techniques (EDC/CRC), and a host computer interface are described.

Abstract: A mass flow grain monitor is located adjacent the upper end of the clean grain elevator assembly of a harvester and includes a load cell having a member that is subject to slight deformation under loads for use in generating an output signal that is proportional to the load. As the grain flow reaches the top of the elevator assembly, its direction is changed such that a centrifugal force is exerted by the moving flow that is proportional to the mass of the grain flow at that instant. Such centrifugal force is directed vertically against the deformable member of the load cell which is itself generally horizontally disposed when the harvester is on level ground so that the entire weight of the deformable member can be treated as tare and zeroed out of the system when it is calibrated with the harvester on level ground.

Abstract: A substantially symmetric inductor comprising a plurality of windings, at least one conductor crossover, and a peripheral conductor disposed at the periphery of the plurality of windings, the plurality of windings having a generally symmetric shape, each of the plurality of windings having a center and being of a different size from other ones of the plurality of windings, the peripheral conductor being generally symmetric and having a center, the plurality of windings and the peripheral conductor being substantially concentric, the conductor crossovers being disposed such that the symmetry of the inductor in substantially preserved. A method of winding an inductor such that the inductor is substantially symmetric about a center of the inductor, whereby signal degradation due to asymmetry of the inductor is substantially minimized.

Abstract: Time-of-day information encoded into video signals can be managed to resolve conflicts and correct errors. In one embodiment, the invention includes receiving a plurality of video signals that include time-of-day information, evaluating the received signals for time-of-day information conflicts, extracting the time-of-day information from the video signals in accordance with the evaluation, determining a time-of-day using the extracted information in accordance with the evaluation, and setting a system clock based on the determined time of day. In another embodiment, the invention includes receiving a video stream, determining the source of the video stream, and modifying time-of-day information in the video stream based on the determined source.

Abstract: A variety of different tuners can be used in a media center or other video component using a microcontroller to address each one. In one embodiment the invention includes a tuner to receive modulated video signals, the tuner having an external control interface to receive commands in a first protocol from an external agent, and a microcontroller to receive external tuner commands in a second protocol, to convert the external commands from the second protocol to the first protocol, and to transmit the converted external commands to the tuner.

Abstract: A compact disk drive controller to control the access of information from an optical compact disk (CD) digital data storage device by a host computer using an integrated drive electronics (IDE) data bus or an industry standard architecture (ISA) data bus is disclosed. A digital signal processor (DSP) interface to the drive electronics of the CD drive, a dynamic random access memory (DRAM) controller, an error correction code (ECC) data corrector, an error detection and correction (EDC) device employing cyclical redundancy checking techniques (EDC/CRC), and a host computer interface are described.

Abstract: A compact disk drive controller to control the access of information from an optical compact disk (CD) digital data storage device by a host computer using an integrated drive electronics (IDE) data bus or an industry standard architecture (ISA) data bus is disclosed. A digital signal processor (DSP) interface to the drive electronics of the CD drive, a dynamic random access memory (DRAM) controller, an error correction code (ECC) data corrector, an error detection and correction (EDC) device employing cyclical redundancy checking techniques (EDC/CRC), and a host computer interface are described.

Abstract: A wireless local area network comprising a plurality of computing entities communicating over a common communications frequency within a local area network operates a transmission deferral method whereby each computing entity defers its own transmissions if it receives a signal at said communications frequency which is above a threshold value set within said computing entity, and which is decodable. Each computing entity is capable of varying dynamically the value of its threshold level above which receipt of signals results in the computing entity deferring its own transmission. Received signals on the communications frequency which are less than the threshold value do not result in the computing entity deferring its transmissions, but are ignored by the computing entity. The threshold value is varied according to whether traffic from more remote signal sources are sufficiently intense that the local traffic cannot be decoded.

Abstract: A system for redistributing a television signal to a multiplicity of receiver units within a multiple dwelling unit (MDU) includes a main receiving antenna which receives a broadband television signal and a translation device that translates the broadband television signal into a different carrier frequency band. One or more broadcasting antennas, located at advantageous sites within the MDU, transmit the translated television signal along one or more walls of the MDU to be received by antennas associated with one or more individual receiver units. Each receiver unit demodulates the received television signal and provides a user-specified channel to a television set for display.

Abstract: An optical input system for correcting astigmatism introduced by off-axis reflectors in a spectrograph includes an aspheric mirror producing a correcting factor which compensates for the spectrograph distortions and enables the spectrograph to produce multiple astigmatic light images at its two-dimensional charge-coupled-device output.

Abstract: A method and apparatus for ensuring that MIDI data stored in the subcode channel area of a compact disc is synchronized with the main channel audio of the compact disc. Synchronization problems have been created when transferring audio on a tape from an audio studio to a PCM 1630 tape which is to be used as a compact disc master resulting in a squashing or stretching of the audio data with respect to the MIDI data. One reason this can occur is because F-1 tape records and plays back at 29.97 frames per second while PCM 1630 tape records and plays back at 30 frames per second. The result is that even if the MIDI data and main channel audio data begin in sync, they lose sync during transfers and may drift apart linearly over time as well as be offset with respect to each other. The present invention corrects such synchronization problems by playback simulation, MIDI data/Main channel audio sync measurement and MIDI data adjustment.

Abstract: A tag comparator and bank selector for a set-associative cache in a computer system operates in a minimum time so that a cache hit or miss signal is generated early in a memory cycle. The data memory of the cache has two (or more) banks, with a tag store for each bank, and the two banks are accessed separately and in parallel using the index (low order address bits) while the tag translation is in progress. Two bit-by-bit tag compares are performed, one for each tag store, producing two multibit match indications, one bit for each tag bit in each tag store. These two match indications are applied to two separate dynamic NOR gates, and the two outputs applied to a logic circuit to detect a hit and generate a bank-select output. There are four possible outcomes from the compare operation: both banks miss, left bank hits, right bank hits, and both banks hit. The later condition indicates a possible ambiguity, and neither data item should be used, so a miss is signalled.

Abstract: An apparatus and method for encoding data in a text format such as ASCII or EBCDIC on a laser disc or compact disc without affecting the digitized sound by utilizing what is known as the subcode channel of the laser disc or compact disc. By storing text data in the subcode channel region as described herein, it is possible to create subtitles for movies in a number of languages such that the language in which the subtitles appear is user selectable. In this manner, it is possible to create laser discs having subtitle information in, for example, ten languages thereby avoiding the necessity of creating ten separate laser discs, each having a different language used for subtitling.

Abstract: The physical organization of a memory cell array in an integrated circuit cache memory system is different from its logical organization because the bit lines of the array are divided into segments to physically divide the memory cell array into sub-arrays, and multiplexing the bit line segments of groups of neighboring bit lines are multiplexed to respective data lines. "Early" address bits control row decoders which select a row of memory cells in each sub-array to assert data signals on the bit line segments in each sub-array. "Late" address bits control the multiplexing of the data signals on the bit line segments to the data lines. By segmenting the bit lines, the number of "late" address bits is increased relative to the number of "early" address bits to increase the memory access speed in data processing systems that employ virtual addressing but store data in cache memory in association with physical addresses.

Abstract: A heat exchange apparatus (10) formed of a plurality of heat exchange modules (20) mounted together in side-by-side relationship to form a box-like array. Each heat exchange module (20) houses a multiplicity of heat exchange tubes (44) which provide a flow passage through which a first heat exchange fluid, such as air, is passed in heat exchange relationship with a second heat exchange fluid, such as flue gas, passing through the heat exchange apparatus over the heat exchange tubes.

Abstract: A recuperative tubular heat exchanger comprised of a plurality of tube-bundle heat exchange modules (20) stacked in a spaced array and interconnected by U-shaped, open-end header conduits (30) to form a serpentine flowpath through which a fluid to be heated is passed in heat exchange relationship with a heating fluid passing in cross flow over the tube bundle modules. The interconnected modules together with the header conduits form an integral assembly which is free to slide on support beams (26) so as to float within the housing (12) of the heat exchanger in response to the thermal deformation of the tube bundle modules.