Abstract: A client device (e.g., smart phone) submits scroll log data to a server. The scroll log data comprises time stamps of load start events, load end events and lag events. The server then computes a performance value using the scroll log data and, responsive to the performance value, adjusts a first scroll parameter for use by client devices. The server also transmits the adjusted first scroll parameter to the client device for use in a graphical user interface scroll on an application executing on the client device. The server then transmits data to the client device in response to the client device's use of the adjusted first scroll parameter.

Abstract: A client device (e.g., smart phone) submits scroll log data to a server. The scroll log data comprises time stamps of load start events, load end events and lag events. The server then computes a performance value using the scroll log data and, responsive to the performance value, adjusts a first scroll parameter for use by client devices. The server also transmits the adjusted first scroll parameter to the client device for use in a graphical user interface scroll on an application executing on the client device. The server then transmits data to the client device in response to the client device's use of the adjusted first scroll parameter.

Abstract: The system contains a substrate having at least one electrical trace formed thereon. An opening is formed in the substrate. The opening comprising at least one wall. An electrically conductive fill is formed in the opening. The electrically conductive fill is chemically bonded to the wall and electrically contacted with the electrical trace.

Abstract: The system contains a substrate having at least one electrical trace formed thereon. An opening is formed in the substrate. The opening comprising at least one wall. An electrically conductive fill is formed in the opening. The electrically conductive fill is chemically bonded to the wall and electrically contacted with the electrical trace.

Abstract: A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).

Abstract: A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).

Abstract: A system and method for the fabrication of high reliability high performance Lange couplers (optionally including capacitors (1011), inductors (1012), multi-layer interconnects (1013), and resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed Lange coupler method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).