Patents by Inventor Michael Chapman
Michael Chapman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240138035Abstract: The disclosure describes a magnetic induction heating system for viscous and thermally sensitive process streams. The magnetic induction system provides an industrial heating alternative to steam by providing gentle and uniform heating with a high degree of temperature uniformity and stability. The magnetic induction heating system for viscous and thermally sensitive process streams generally includes an induction system that provides gentle heating through a combination of coil design, coupled with a high efficiency heat exchange element capable of gentle heating and through electronic control is such a way unprecedented stability, safety, uniformity, compactness, energy control, and efficiency are achieved.Type: ApplicationFiled: February 22, 2022Publication date: April 25, 2024Applicant: INDUCTION FOOD SYSTEMS, INC.Inventors: George SADLER, Francesco AIMONE, Edward LUKAWSKI, Michael CHAPMAN
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Patent number: 11963929Abstract: Disclosed herein are glass pharmaceutical vials having sidewalls of reduced thickness. In embodiments, the glass pharmaceutical vial may include a glass body comprising a sidewall enclosing an interior volume. An outer diameter D of the glass body is equal to a diameter d1 of a glass vial of size X as defined by ISO 8362-1, wherein X is one of 2R, 3R, 4R, 6R, 8R, 10R, 15R, 20R, 25R, 30R, 50R, and 100R as defined by ISO 8362-1. However, the sidewall of the glass pharmaceutical vial comprises an average wall thickness Ti that is less than or equal to 0.85*s1, wherein s1 is a wall thickness of the glass vial of size X as defined by ISO 8362-1 and X is one of 2R, 3R, 4R, 6R, 8R, 10R, 15R, 20R, 25R, 30R, 50R, and 100R as defined by ISO 8362-1.Type: GrantFiled: May 2, 2023Date of Patent: April 23, 2024Assignee: CORNING INCORPORATEDInventors: Connor Thomas O'Malley, Sinue Gomez-Mower, Weirong Jiang, Joseph Michael Matusick, Christie Leigh McCarthy, Christy Lynn Chapman, John Stephen Peanasky, Shivani Rao Polasani, James Ernest Webb, Michael Clement Ruotolo, Jr., Bryan James Musk, Jared Seaman Aaldenberg, Eric Lewis Allington, Douglas Miles Noni, Jr., Amber Leigh Tremper, Kristen Dae Waight, Kevin Patrick McNelis, Patrick Joseph Cimo, Steven Edward DeMartino, Robert Anthony Schaut, Adam Robert Sarafian
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Patent number: 11963928Abstract: Disclosed herein are glass pharmaceutical vials having sidewalls of reduced thickness. In embodiments, the glass pharmaceutical vial may include a glass body comprising a sidewall enclosing an interior volume. An outer diameter D of the glass body is equal to a diameter d1 of a glass vial of size X as defined by ISO 8362-1, wherein X is one of 2R, 3R, 4R, 6R, 8R, 10R, 15R, 20R, 25R, 30R, 50R, and 100R as defined by ISO 8362-1. However, the sidewall of the glass pharmaceutical vial comprises an average wall thickness Ti that is less than or equal to 0.85*s1, wherein s1 is a wall thickness of the glass vial of size X as defined by ISO 8362-1 and X is one of 2R, 3R, 4R, 6R, 8R, 10R, 15R, 20R, 25R, 30R, 50R, and 100R as defined by ISO 8362-1.Type: GrantFiled: May 2, 2023Date of Patent: April 23, 2024Assignee: CORNING INCORPORATEDInventors: James Ernest Webb, Sinue Gomez-Mower, Weirong Jiang, Joseph Michael Matusick, Christie Leigh McCarthy, Connor Thomas O'Malley, John Stephen Peanasky, Shivani Rao Polasani, Steven Edward DeMartino, Michael Clement Ruotolo, Jr., Bryan James Musk, Jared Seaman Aaldenberg, Eric Lewis Allington, Douglas Miles Noni, Jr., Amber Leigh Tremper, Kristen Dae Waight, Kevin Patrick McNelis, Patrick Joseph Cimo, Christy Lynn Chapman, Robert Anthony Schaut, Adam Robert Sarafian
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Patent number: 11958133Abstract: In one or more embodiments, a method includes selecting a cemented carbide substrate from a plurality of cemented carbide substrates in a substrate inventory. Each of the plurality of cemented carbide substrates have a substantially planar top surface. The method also includes emitting a plurality of laser pulses from a laser towards at least the substantially planar top surface of the cemented carbide substrate to ablate selected regions of the cemented carbide substrate thereby forming the cemented carbide substrate into a selected shape.Type: GrantFiled: December 31, 2019Date of Patent: April 16, 2024Assignee: US SYNTHETIC CORPORATIONInventors: Paul Douglas Jones, Benjamin Michael Spencer, Brent Richard Eddy, Mark Pehrson Chapman
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Patent number: 11941932Abstract: The present disclosure provides methods, devices, and systems for controlling access to a controlled area. The method may comprise receiving a credential identifier in an access controller associated with an entrance to the enclosed area, and then authenticating the credential identifier. The method may then comprise sending an unlock signal through a solid state relay within the access controller to power a lock associated with but external to the access controller to unlock a door at the entrance to the enclosed area when the credential identifier has been successfully authenticated.Type: GrantFiled: May 9, 2022Date of Patent: March 26, 2024Assignee: Isonas, Inc.Inventors: Michael Radicella, Roger Matsumoto, Matthew J. Morrison, Richard Burkley, Kriston Chapman, Shirl Jones
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Publication number: 20240070316Abstract: Techniques for a privacy-based user data sharing protocol disclose a system that receives a request to consent to share user data with a subscriber device. The system identifies, based on the request, a smart contract associated with the subscriber device. The smart contract comprises one or more conditions for collecting and managing the user data. The system generates a token based on the smart contract, in which the token indicates consent by a user to share the user data with the subscriber device according to the one or more conditions. The system records the generated token to a blockchain.Type: ApplicationFiled: August 31, 2023Publication date: February 29, 2024Inventors: Charles William SIBBACH, Jonathan Michael PADILLA, Lucas Duffield NOVAK, Robert Alexander MCCOMB, Scott DAVIS, Todd Allen CHAPMAN, Varun PARTHASARATHY
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Patent number: 11916840Abstract: Aspects of the present disclosure include methods, apparatuses, and computer readable media for receiving at least one TP packet, computing a current data rate or an end time of a low throughput phase, determining if TP is in the low throughput phase, aggregating the at least one received TP packet or an ACK relating to the at least one received TP packet in response to determining that the TP is not in the low throughput phase, and transmitting the ACK to a sending device.Type: GrantFiled: February 13, 2020Date of Patent: February 27, 2024Assignee: QUALCOMM IncorporatedInventors: Prachi Agrawal, Arnaud Meylan, Vandit Pinal Desai, Rajashekar Chilla, Prasad Gadde, Hariharan Subramanian, Vamsi Dokku, Ryan Michael Chapman, Subash Abhinov Kasiviswanathan, Sean Nicholas Tranchetti, Raul Martinez, Conner Austin Huff
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Publication number: 20240007104Abstract: A gate driver circuit which integrates a synchronous bootstrap circuit in an isolation well of an integrated circuit, such that the synchronous bootstrap capacitor connected to the synchronous bootstrap circuit (and to the corresponding switch node of a power converter) can float with the corresponding switch node. Due to this feature, the voltage on one synchronous bootstrapping capacitor can be used to charge the synchronous bootstrapping capacitor of another (higher level) synchronous bootstrap circuit in a separate isolation well connected to a different switch node. As a result, the supply voltages for the synchronous bootstrap circuits in different isolation wells can all be supplied from a single ground referenced supply Vdd.Type: ApplicationFiled: June 29, 2023Publication date: January 4, 2024Applicant: Efficient Power Conversion CorporationInventors: Edward Lee, Ravi Ananth, Michael Chapman, Michael A. de Rooij, David C. Tam
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Publication number: 20230417806Abstract: An integrated current sensing amplifier with offset cancellation implemented in GaN technology. The current sensing amplifier senses the current flowing through a low side power FET or a high side power FET of a half bridge circuit. The current sensing amplifier uses the off time of the power FET for storing the amplifier input offset voltage. The stored amplifier input offset voltage is then used to cancel the amplifier input offset voltage during the on time of the power FET, which is the interval that requires current sensing.Type: ApplicationFiled: June 28, 2023Publication date: December 28, 2023Applicant: Efficient Power Conversion CorporationInventors: Edward Lee, Ravi Ananth, Michael Chapman
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Publication number: 20230421139Abstract: A single-ended or differential level-shifting interface for GaN ICs that allows GaN ICs to be controlled with standard low-voltage CMOS level inputs. The logic level shift circuit is based on a resistive network is therefore insensitive to process and temperature variations, making it particularly well suited for implementation in a GaN IC. The resistive network for a single-ended input signal includes a first branch with a voltage divider connected to the input signal. The voltage divider of the first branch provides a level shifted and scaled input signal to the first input of a comparator at the optimal bias point of the comparator. The resistive network also includes a second voltage divider branch with hysteresis for providing a trip voltage to the second input to the comparator, also at the optimal bias point of the comparator. The comparator outputs complementary bipolar level shifted signals corresponding to the input signal.Type: ApplicationFiled: June 26, 2023Publication date: December 28, 2023Applicant: Efficient Power Conversion CorporationInventors: Ravi Ananth, Edward Lee, Michael Chapman
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Publication number: 20230365514Abstract: The present invention relates to macrocyclic compounds which are capable of selective binding to a target saccharide (e.g. glucose), making them particularly well suited for use in saccharide sensing applications. The present invention also relates to processes for the preparation of said compounds, to compositions and devices comprising them, and to their use in the detection of a target saccharide.Type: ApplicationFiled: October 7, 2022Publication date: November 16, 2023Inventors: Anthony Peter Davis, Robert Tromans, Miriam Ruth Wilson, Michael Glen Orchard, Andrew Michael Chapman, Michael Roger Tomsett, Johnathan Vincent Matlock
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Publication number: 20230188127Abstract: A bootstrapping gate driver circuit in which the size of the bootstrap capacitors is reduced. The gate-to-source voltage of the high side (pull-up) FET is pre-driven to an initial voltage (pre-driven voltage) before the bootstrap capacitor releases charge to charge up the gate-to-source voltage of the high side FET. This pre-driven voltage is applied through a pre-driven FET that allows current flow from the supply voltage to charge the gate of the high side FET to the pre-driven voltage. The pre-driven FET is turned on by a turn-on signal that occurs before the bootstrap capacitor releases charge. The pre-driven period (and hence, the pre-driven voltage) is determined from the time that the pre-driven FET begins to turn on, to the time that the bootstrap capacitor starts to release charge.Type: ApplicationFiled: December 7, 2022Publication date: June 15, 2023Inventors: Edward Lee, Ravi Ananth, Michael Chapman
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Publication number: 20230179203Abstract: A circuit to enhance the driving capability of conventional inverting bootstrapping GaN drivers. When the inverting driver input is logic high and the driver output is off, the voltage stored on the first bootstrap capacitor for turning on the high side (pull-up) FET of the inverting driver is charged to the full supply voltage using an active charging FET, instead of using a diode or diode-connected FET in a conventional bootstrapping driver. The gate voltage of the active charging FET is bootstrapped to a voltage higher than supply voltage by a second bootstrap capacitor that connects to the inverting driver input, which is at a logic high. The second bootstrap capacitor is charged by an additional diode or diode-connected FET connected to the supply voltage when the inverting driver input is a logic low.Type: ApplicationFiled: December 7, 2022Publication date: June 8, 2023Inventors: Edward Lee, Michael Chapman, Ravi Ananth, Michael A. de Rooij
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Publication number: 20230179195Abstract: A bootstrapping circuit that utilizes multiple pre-charged capacitor voltages and applies the capacitor voltages to the high side FET of a GaN bootstrapping driver. During the pre-charging phase of the bootstrapping driver, multiple capacitors are charged in parallel to the supply voltage. During the driving phase of the bootstrapping driver, the capacitors are connected in series through a number of FETs and connected to the gate terminal of the high side FET of the bootstrapping driver. As a result, the gate-to-source voltage of the high side FET is equal to or greater than the supply voltage during the driving phase, increasing the driving capability of the high side FET and reducing the total required capacitance and die area of the bootstrapping driver.Type: ApplicationFiled: December 7, 2022Publication date: June 8, 2023Inventors: Edward Lee, Michael Chapman, Ravi Ananth
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Publication number: 20230083796Abstract: The present technology is related to employing a template/macro-based order entry system. An initial order data message contains a macro that establishes the initial parameters for an order and a unique ID is associated with the template. Subsequent, and potentially smaller sized data messages contain the unique ID as well as relevant order details for placing an order. Of course, the technology described herein envisions a much broader concept of reducing message sizes to help improve overall latency and is not limited to order entry.Type: ApplicationFiled: November 22, 2022Publication date: March 16, 2023Inventors: Michael CHAPMAN, Michael LAZAREV, John VACCARO
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Publication number: 20230039827Abstract: Methods, systems, and computer programs are presented for estimating downtime and recovery time after a disaster. One method includes an operation for calculating component fragility functions for components of a facility that are vulnerable to damage after a disaster. Further, the method includes calculating component recovery functions for the components of the facility. The component recovery functions indicate a probability of recovery after a disaster over time. The method further includes operations for calculating a facility fragility function and a facility recovery function based on the component fragility functions and the component recovery functions, and for determining a downtime for the facility for a given intensity associated with the disaster. Further, the method includes an operation for causing presentation of the downtime for the facility on a user interface (UI).Type: ApplicationFiled: August 4, 2021Publication date: February 9, 2023Inventors: Ahmad Wani, Nicole Hu, Chengwei Zhai, Deepak Pant, Jaskanwal Chhabra, Lynne Burks, Michael Chapman, Ojas Rege, Abhineet Gupta, Shabaz Patel, Youngsuk Kim
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Patent number: 11562427Abstract: The present technology is related to employing a template/macro-based order entry system. An initial order data message contains a macro that establishes the initial parameters for an order and a unique ID is associated with the template. Subsequent, and potentially smaller sized data messages contain the unique ID as well as relevant order details for placing an order. Of course, the technology described herein envisions a much broader concept of reducing message sizes to help improve overall latency and is not limited to order entry.Type: GrantFiled: February 27, 2020Date of Patent: January 24, 2023Assignee: NASDAQ, INC.Inventors: Michael Chapman, Michael Lazarev, John Vaccaro
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Patent number: 11541122Abstract: The present invention provides glucose sensitive insulin derivatives comprising a macrocycle, a glucose mimetic and human insulin or an analogue thereof, and their pharmaceutical use. Furthermore, the invention relates to pharmaceutical compositions comprising such glucose sensitive insulin derivatives, and to the use of such compounds for the treatment or prevention of medical conditions relating to diabetes.Type: GrantFiled: September 18, 2019Date of Patent: January 3, 2023Inventors: Thomas Hoeg-Jensen, Alice Ravn Madsen, Thomas Kruse, Per Sauerberg, Anthony Murray, Andrew Michael Chapman, Anthony Peter Davis
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Publication number: 20220195886Abstract: A turbomachine for a vehicle is provided. The turbomachine includes a first rotatable component; a first power source operatively coupled with the first rotatable component; a second power source selectively coupled with the first rotatable component; and a controller having one or more processors and one or more memory devices, the one or more memory devices storing instructions that when executed by the one or more processors cause the one or more processors to perform operations, in performing the operations, the one or more processors are configured to: receive an input indicating an engine shutdown of the turbomachine; and in response to the engine shutdown, cause the second power source to provide power to and rotate the first rotatable component.Type: ApplicationFiled: December 18, 2020Publication date: June 23, 2022Inventors: Brian Lewis Devendorf, Christopher Michael Chapman, Arthur William Sibbach
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Publication number: 20220084087Abstract: A system and method for providing access to data of a first party including receiving information for identifying the first party, authenticating the first party using the received information for identifying the first party and generating a first read-only personal identification number (PIN). The first read-only PIN is associated with a first set of access rights for the data of the first party and provided to a second party. The first read-only PIN is stored with the first set of access rights in a computer database. A third party receives the first read-only PIN from the second party, authenticates the received first read-only PIN using the stored first read-only PIN and provides the second party with access to at least a portion of the data of the first party using the first set of access rights associated with the first read-only PIN if the received first read-only PIN is authenticated.Type: ApplicationFiled: November 30, 2021Publication date: March 17, 2022Inventor: Jeffrey Michael Chapman