Abstract: Provided is an analog-to-digital converter and a voltage offset correction method thereof. The analog-to-digital converter may include a digital-to-analog converter (DAC) configured to generate a first comparison voltage, a comparison circuit configured to output a first comparison result signal based on a result of comparing the first comparison voltage with a second comparison voltage, and a control circuit configured to control the DAC and output an output signal, wherein the DAC may include a correction circuit configured to generate a correction voltage by selectively switching switches connected to terminals to which a plurality of reference voltages are applied, and correct a voltage offset of the comparison circuit based on the correction voltage.

Abstract: A cooking device and method that allow food, including eggs, to be cooked in a microwave or rapid cook oven are provided. The device includes a base having at least one receptacle with a base surface, the base having a susceptor that is embedded in a first insulator and positioned to be in thermal contact with the base surface, and at least one yolk cap having a phase change material embedded in a third insulator that is in thermal contact with the bottom surface of the yolk cap. The yolk cap is sized and shaped to cover at least a portion of the receptacle. A lid having a top surface, a bottom surface, a second insulator and at least one shield that is embedded in the second insulator and shaped to cover the receptacle is provided. The bottom surface of the lid is sized and shaped to cover the receptacle.

Abstract: An apparatus configured to transmit and receive a radio frequency (RF) signal is provided. The apparatus includes a digital-to-analog converter (DAC) configured to convert a digital signal into an analog signal, a power amplifier configured to amplify the analog signal, and an antenna configured to output, as the RF signal, the amplified analog signal to the outside. The DAC includes a current cell matrix including a plurality of current cells configured to generate the analog signal, a plurality of normal paths configured to control the plurality of current cells to be turned on or off, based on the digital signal, and a plurality of alternative paths configured to selectively consume power, based on a pattern of the digital signal.

Abstract: A monitoring circuit includes a sensor circuit having a plurality of devices and a selection circuit, which selects a device to be monitored among the plurality of devices, an input circuit, which applies, based on input digital data, a first signal to the device to be monitored and an output circuit, which generates output digital data based on a second signal generated by the sensor circuit. The input circuit includes a digital-to-analog converter, and the output circuit includes an analog-to-digital converter.

Abstract: An antenna device includes an antenna array including a plurality of first antenna elements, arranged in a 2-by-2 array, a plurality of second antenna elements arranged in a 2-by-2 array, a first switching circuit, a second switching circuit connected to the first switching circuit and the first antenna elements, a third switching circuit connected to the first switching circuit and the second antenna elements, and a processor connected to the switching circuits. The processor is configured to control at least one of the switching circuits to operate in a single mode, among the plurality of modes, based on a single beam pattern among a plurality of predetermined beam patterns and to feed power to the antenna array through the first switching circuit, the second switching circuit, and the third switching circuit, to transmit a signal having the beam pattern.

Abstract: An apparatus configured to transmit and receive a radio frequency (RF) signal is provided. The apparatus includes a digital-to-analog converter (DAC) configured to convert a digital signal into an analog signal, a power amplifier configured to amplify the analog signal, and an antenna configured to output, as the RF signal, the amplified analog signal to the outside. The DAC includes a current cell matrix including a plurality of current cells configured to generate the analog signal, a plurality of normal paths configured to control the plurality of current cells to be turned on or off, based on the digital signal, and a plurality of alternative paths configured to selectively consume power, based on a pattern of the digital signal.

Abstract: A digital droop detector for detecting whether a droop occurs in a power supply voltage, may include processing circuitry configured to, detect a voltage level change of a power supply voltage in response to a clock signal, the detecting the voltage level change including converting the detected voltage level change into a first code, correct at least one nonlinearity included in the first code, the correcting including converting the first code into a second code and a target range, and adjust a delay magnitude of the clock signal based on the second code.

Abstract: An analog-to-digital conversion circuit includes analog-to-digital converters (ADCs) including a target analog-to-digital converter (ADC) providing second data samples, a first adjacent ADC providing first data samples, and a second adjacent ADC providing third data samples. The ADCs perform an analog-to-digital conversion using a time-interleaving approach in response to clock signals having different phases and including a reference clock signal. A timing calibration circuit includes a relative time skew generator generating a relative time skew and an absolute time skew generator generate an absolute time skew. A clock generator adjusts at least one phase of the clock signals based on the absolute time skew.

Abstract: A bootstrap circuit for generating an output signal through a pre-charge operation and a sample operation, includes: a sampler including a sampling switch configured to sample an input signal, a first protection switch connected between an input node and the sampling switch, and a second protection switch connected between the sampling switch and an output node; and a driver configured to drive the sampler based on a power supply voltage and the input signal.

Abstract: A multiplexer includes a charging circuit; a plurality of sampling switches receiving a plurality of input signals; and a plurality of boosting circuits connected between the sampling switches and the charging circuit and sharing the charging circuit. First and second charging switches of the charging circuit are controlled by a first clock signal. Each of the boosting circuits includes a first boosting switch connected to a first node of the charging circuit and a gate of one of the sampling switches, a second boosting switch connected between a second node of the charging circuit and the one sampling switch, and a level shifter configured to control the first boosting switch and the second boosting switch in response to a second clock signal and a selection signal.

Abstract: A digital droop detector for detecting whether a droop occurs in a power supply voltage, may include processing circuitry configured to, detect a voltage level change of a power supply voltage in response to a clock signal, the detecting the voltage level change including converting the detected voltage level change into a first code, correct at least one nonlinearity included in the first code, the correcting including converting the first code into a second code and a target range, and adjust a delay magnitude of the clock signal based on the second code.

Abstract: A semiconductor integrated circuit includes a digital-to-analog converter and a built-in self-test circuit. The digital-to-analog converter performs a normal conversion operation to generate an analog output signal by converting a digital input signal corresponding to an external digital signal that is provided from an external device outside the semiconductor integrated circuit and provide the analog output signal to the external device. The built-in self-test circuit, while the digital-to-analog converter performs the normal conversion operation, performs a real-time monitoring operation to generate a comparison alarm signal based on the digital input signal and the analog output signal such that the comparison alarm signal indicates whether the digital-to-analog converter operates normally.

Abstract: A frequency multiplier includes a capacitor circuit having a plurality of capacitors therein, and is responsive to a differential input signal applied to an inverting input node and a non-inverting input node thereof. A frequency multiplication circuit (FMC) is provided, which has a plurality of transistors therein. The FMC is configured to receive components of the differential input signal passing through the plurality of capacitors, and multiply a frequency of the components of the differential input signal. A plurality of inductor loads are provided, which are connected to an inverting output node and a non-inverting output node of the FMC, and are configured to convert a current signal generated by the FMC into a voltage signal.

Abstract: The present invention relates to an innovative thermal design concept of tailoring the absorptance and emittance of a coating—namely silicon oxide (SiOx) coated aluminized Kapton—as a radiator coating for small, nano-satellite (i.e., CubeSat) thermal management. The present invention improves on the thermal design of existing satellites, by: a) thermally coupling all components to the baseplate to eliminate the need for heater power for the battery; b) using all six sides of the CubeSat as radiators by changing the wall material from fiberglass to aluminum; c) using a different ratio of absorptance to emittance for each side by tailoring the SiOx thickness; d) having a high emittance for the wall interior and components; and e) eliminating the need for MLIs. The elimination of the MLIs reduces the volume and increases the clearance to minimize the risk for solar array deployment and cost of the thermal control subsystem.

Abstract: An analog-to-digital conversion circuit includes; a first analog-to-digital converter (ADC), a second ADC and a third ADC collectively configured to perform conversion operations according to a time-interleaving technique, and a timing calibration circuit configured to calculate correlation values and determine differences between the correlation values using first samples generated by the first ADC, second samples generated by the second ADC, and third samples generated by the third ADC during sampling periods, wherein the timing calibration circuit is further configured to control a phase of a clock signal applied to the second ADC in response to a change in absolute value related to the differences generated during the sampling periods.

Abstract: A temperature measurement circuit includes a band-gap reference circuit configured to generate a band-gap reference voltage that is fixed regardless of an operation temperature, a reference voltage generator circuit configured to generate a measurement reference voltage by adjusting the band-gap reference voltage, a sensing circuit configured to generate a temperature-variant voltage based on a bias current, where the temperature-variant voltage is varied depending on the operation temperature, an analog-digital converter circuit configured to generate a first digital code indicating the operation temperature based on the measurement reference voltage and the temperature-variant voltage, and an analog built-in self-test (BIST) circuit configured to generate a plurality of flag signals indicating whether each of the band-gap reference voltage, the measurement reference voltage, and a bias voltage corresponding to the bias current is included in a predetermined range.

Abstract: A test method is provided to test a semiconductor integrated circuit including an analog-to-digital converter and/or a digital-to-analog converter. An analog test signal having a test pattern is generated using an analog test signal generator or a digital test signal having the test pattern using a digital test signal generator. An analog output signal corresponding to the test pattern is generated by applying, as a digital input signal, the digital test signal having the test pattern to a digital-to-analog converter responsive to generation of the digital test signal. A digital output signal corresponding to the test pattern is generated by applying, as an analog input signal, the analog test signal having the test pattern or the analog output signal corresponding to the test pattern to an analog-to-digital converter. A normality of the semiconductor integrated circuit is determined based on the digital output signal corresponding to the test pattern.

Abstract: A temperature measurement circuit includes a band-gap reference circuit configured to generate a band-gap reference voltage that is fixed regardless of an operation temperature, a reference voltage generator circuit configured to generate a measurement reference voltage by adjusting the band-gap reference voltage, a sensing circuit configured to generate a temperature-variant voltage based on a bias current, where the temperature-variant voltage is varied depending on the operation temperature, an analog-digital converter circuit configured to generate a first digital code indicating the operation temperature based on the measurement reference voltage and the temperature-variant voltage, and an analog built-in self-test (BIST) circuit configured to generate a plurality of flag signals indicating whether each of the band-gap reference voltage, the measurement reference voltage, and a bias voltage corresponding to the bias current is included in a predetermined range.

Abstract: An analog-to-digital converter (ADC) includes a coarse ADC that receives an analog input voltage, generates a first digital signal based on the analog input voltage using a successive approximation register (SAR) method, and outputs a residual voltage remaining after the first digital signal is generated. The ADC further includes an amplifier that receives the residual voltage and a test voltage, generates a residual current by amplifying the residual voltage by a predetermined gain, and generates a test current by amplifying the test voltage by the gain. The ADC further includes a fine ADC that receives the residual current and generates a second digital signal based on the residual current using the SAR method, and an auxiliary path that receives the test current and generates a gain correction signal based on the test current. The gain of the amplifier is adjusted based on the gain correction signal.

Abstract: An apparatus configured to transmit and receive a radio frequency (RF) signal is provided. The apparatus includes a digital-to-analog converter (DAC) configured to convert a digital signal into an analog signal, a power amplifier configured to amplify the analog signal, and an antenna configured to output, as the RF signal, the amplified analog signal to the outside. The DAC includes a current cell matrix including a plurality of current cells configured to generate the analog signal, a plurality of normal paths configured to control the plurality of current cells to be turned on or off, based on the digital signal, and a plurality of alternative paths configured to selectively consume power, based on a pattern of the digital signal.