Abstract: A system and method of sending a message to a cellular device having a non-dialable number is described. The system and method can use a standard cellular short code, and by associating the consumer handset with one or more M2M cellular subscriptions/devices enable communications between handsets and private M2M devices. The consumer handset sends an SMS to a short code which is delivered to an SMS Private Routing mechanism which then uses a pre-assigned association between the handset and the M2M device to route the SMS to the M2M cellular device using the private phone number.

Abstract: A method comprises providing a golden ROM unit comprising known good ROM code. The golden ROM is coupled to a ROM socket of a target system. The target system is booted, wherein booting comprises providing power to the target system and independently providing power to the ROM socket. The known good ROM code is loaded from the golden ROM to a system memory of the target system. Power is removed from the ROM socket and the golden ROM is decoupled from the ROM socket. A first subject ROM is coupled to the ROM socket. Power is provided to the ROM socket and the first subject ROM is programmed with the known good ROM code.

Abstract: A system and method of monitoring the communications of remote devices is described. The system includes a plurality of remote devices, where each remote device has one or more sensors and a communications transceiver. A control center, which includes a historical usage database reflecting historical usage patterns for each of the plurality of remote units, analyzes the communications for each of the plurality of remote devices against the historical usage patterns for that remote device to determine when that remote device is malfunctioning or approaching a usage threshold. The control center is then operable to take appropriate corrective action in response to the analysis.

Abstract: A method, system, and computer-usable medium for implementing a programmable DMA master with data checking utilizing a drone system controller. According to an embodiment of the present invention, a drone processor generates a collection of random data and stores a first and second copy of the collection of random data in a first and second memory location in a drone memory. The drone processor writes a third copy of the collection of random data in a processor memory. When the drone processor retrieves the third copy from the processor memory, the drone processor writes the third copy in the second memory location in the drone memory. When the drone processor compares the first copy with the third copy, the results of the compare is written in a status location within the drone processor.

Abstract: A method comprises providing a golden ROM unit comprising known good ROM code. The golden ROM is coupled to a ROM socket of a target system. The target system is booted, wherein booting comprises providing power to the target system and independently providing power to the ROM socket. The known good ROM code is loaded from the golden ROM to a system memory of the target system. Power is removed from the ROM socket and the golden ROM is decoupled from the ROM socket. A first subject ROM is coupled to the ROM socket. Power is provided to the ROM socket and the first subject ROM is programmed with the known good ROM code.

Abstract: A method, apparatus and computer-usable medium are presented for dynamically selecting a clock signal used by a peripheral device that is coupled to a motherboard. When the motherboard is powered off, a clock selector sends the peripheral device an internal clock signal from the peripheral device's own internal clock controller. When the motherboard powers up, the clock selector sends the peripheral device an external clock signal from the motherboard.

Abstract: A method, system, and computer-usable medium for implementing a programmable DMA master with data checking utilizing a drone system controller. According to an embodiment of the present invention, a drone processor generates a collection of random data and stores a first and second copy of the collection of random data in a first and second memory location in a drone memory. The drone processor writes a third copy of the collection of random data in a processor memory. When the drone processor retrieves the third copy from the processor memory, the drone processor writes the third copy in the second memory location in the drone memory. When the drone processor compares the first copy with the third copy, the results of the compare is written in a status location within the drone processor.

Abstract: A method, apparatus and computer-usable medium are presented for dynamically selecting a clock signal used by a peripheral device that is coupled to a motherboard. When the motherboard is powered off, a clock selector sends the peripheral device an internal clock signal from the peripheral device's own internal clock controller. When the motherboard powers up, the clock selector sends the peripheral device an external clock signal from the motherboard.

Abstract: A method, apparatus and computer-usable medium are presented for dynamically selecting a clock signal used by a peripheral device that is coupled to a motherboard. When the motherboard is powered off, a clock selector sends the peripheral device an internal clock signal from the peripheral device's own internal clock controller. When the motherboard powers up, the clock selector sends the peripheral device an external clock signal from the motherboard.

Abstract: A method, system, and computer-usable medium for implementing a programmable DMA master with data checking utilizing a drone system controller. According to an embodiment of the present invention, a drone processor generates a collection of random data and stores a first and second copy of the collection of random data in a first and second memory location in a drone memory. The drone processor writes a third copy of the collection of random data in a processor memory. When the drone processor retrieves the third copy from the processor memory, the drone processor writes the third copy in the second memory location in the drone memory. When the drone processor compares the first copy with the third copy, the results of the compare is written in a status location within the drone processor.

Abstract: A system for integrating multiple electrical system testing functions into a single peripheral component interconnect (PCI) card. The functions of system bring-up and debug are integrated into a single PCI card, which utilizes an operating system and a set of industry standard interfaces to interconnect with standard lab instrumentation. The integrated PCI card utilizes an embedded high performance microprocessor and a compact operating system to provide control over: system-under-test (SUT) power on/off; system device sequencing via programmable General Purpose Input/Output (GPIO); system parametric control (e.g. voltage, temperature, and frequency); system parametric measurement; system debug; and remote control operation via internet interface. In one embodiment, the integrated PCI card comprises the instrumentation controller, Joint Test Action Group (JTAG) Debugger, SUT system controller, and a computer-controlled GPIO card in a single, self aware, half-slot PCI card.

Abstract: A method, system, and computer-usable medium for implementing a programmable DMA master with date checking utilizing a drone system controller. According to a preferred embodiment of the present invention, a drone processor generates a collection of random data and stores a first and second copy of the collection of random data in a first and second memory location in a drone memory. The drone processor writes a third copy of the collection of random data in a processor memory. When the drone processor retrieves the third copy from the processor memory, the drone processor writes the third copy in the second memory location in the drone memory. When the drone processor compares the first copy with the third copy, the results of the compare is written in a status location within the drone processor.

Abstract: A service provider uses a telemetry gateway to communicate with radio communication devices using various incompatible short message service (SMS) protocols. A communication, from the service provider to a radio communication device, passes through the telemetry gateway. The telemetry gateway determines the communication protocol of the radio communication device and converts the communication from a common protocol to the radio communication device's protocol. The telemetry gateway also determines and sends the converted communication over the appropriate communication path for receipt by the radio communication device. The telemetry gateway is also operable for providing registration information and receiving a communication from a radio communication device. The telemetry gateway can convert the received communication to a common protocol and transmit the converted communication to the service provider.

Abstract: A method, apparatus and computer-usable medium are presented for loading firmware onto multiple processors. A firmware controller is coupled to multiple processors and a firmware memory. A service processor, by controlling the operation of the firmware controller, selects one or more of the multiple processors. Under the control of the service processor, the firmware controller sends firmware from the firmware memory to each of the selected processors, either sequentially or simultaneously. If one of the selected processors fails to fully execute the firmware from the firmware memory, the firmware controller notifies the service processor of that failure as well as the particular memory address in the firmware where the failure occurred.

Abstract: A method, apparatus and computer-usable medium are presented for dynamically selecting a clock signal used by a peripheral device that is coupled to a motherboard. When the motherboard is powered off, a clock selector sends the peripheral device an internal clock signal from the peripheral device's own internal clock controller. When the motherboard powers up, the clock selector sends the peripheral device an external clock signal from the motherboard.

Abstract: An apparatus and a method for testing one or more processors. The apparatus and method provide a host computer that issues test case information. The test case information is translated from the architecture used by a host computer to the architecture required by the electronic components. The processors are then able to perform the test case.

Abstract: The present invention provides an apparatus and a method for testing one or more electrical components. The apparatus and method provide a CRC function that is used to calculate a CRC value for a portion of memory. The CRC value is compared with an expected CRC value to determine if the electrical component passed or failed the test.

Abstract: A service provider uses a telemetry gateway to communicate with radio communication devices using various incompatible short message service (SMS) protocols. A communication, from the service provider to a radio communication device, passes through the telemetry gateway. The telemetry gateway determines the communication protocol of the radio communication device and converts the communication from a common protocol to the radio communication device's protocol. The telemetry gateway also determines and sends the converted communication over the appropriate communication path for receipt by the radio communication device. The telemetry gateway is also operable for providing registration information and receiving a communication from a radio communication device. The telemetry gateway can convert the received communication to a common protocol and transmit the converted communication to the service provider.

Abstract: An apparatus and a method for testing one or more processors. The apparatus and method provide a host computer that issues test case information. The test case information is translated from the architecture used by a host computer to the architecture required by the electronic components. The processors are then able to perform the test case.

Abstract: The present invention provides an apparatus and a method for testing one or more electrical components. The apparatus and method provide a CRC function that is used to calculate a CRC value for a portion of memory. The CRC value is compared with an expected CRC value to determine if the electrical component passed or failed the test.