Abstract: A method is described for forming a high gain bipolar junction transistor in a optimized CMOS integrated circuit. The bipolar junction transistor comprises a compensated base region (130) which is formed by forming the p-well region (20) and the n-well region (30) in a common substrate region.

Abstract: A method is described for forming a high gain bipolar junction transistor in a optimized CMOS integrated circuit. The bipolar junction transistor comprises a compensated base region (130) which is formed by forming the p-well region (20) and the n-well region (30) in a common substrate region.

Abstract: A programmable, electronic filter (10) includes a memory device such as a Read Only Memory ROM (22) for storing specific cut-off frequency adjustment data corresponding to various cut-off frequencies. The ROM (22) receives a ROM address (28) corresponding to a cut-off frequency signal (26). The ROM (22) generates a specific cut-off frequency adjustment value (30) for a digital-to-analog convertor (20) to produce an output reference current (34). A reference voltage (40), an error amplifier (14), a master transconductance element (16), and a capacitor (18) serve as a tuning loop and ultimately produce a control signal (38) in response to the output reference current (34). Control signal (38) serves as an input to slave filter (12) along with the cut-off frequency signal (26). The slave filter (12) may then serve as an electronic filter having the desired frequency-response characteristic.