Abstract: In one aspect, a radiation hardened transistor includes a buried source, buried drain and a poly-silicon gate separated from the buried source and the buried drain by a buried oxide. A recessed P+ implant or a blanket P+ implant is disposed in a substrate. A portion of the recessed P+ implant or a portion of the blanket P+ implant is disposed beneath outer edges of the poly-silicon gate, in a channel separating the buried source and the buried drain.

Abstract: A primary surface recuperator is made from a plurality of components, one of such components being a primary surface sheets. The primary surface sheet is used to transfers heat from a donor fluid to a recipient fluid. A first sheet portion of the primary surface sheet has a pair of sides and has a preestablished thermal deformation characteristic including a resistance to high temperature deformation and a high temperature resistance to corrosion. A second sheet portion has a pair of sides and has a preestablished thermal deformation characteristic being less than the resistance to high temperature deformation and the high temperature resistance to corrosion of the first sheet portion. The first sheet and the second sheet are attached at a respective one of the pair of sides of the first sheet portion and the second sheet portion forming an axis. The axis is positioned at an angle to the pair of sides.

Abstract: A primary surface recuperator is made from a plurality of components, one of such components being a primary surface sheets. The primary surface sheet is used to transfers heat from a donor fluid on a donor side to a recipient fluid on a recipient side. And to increase the efficiency of this transfer, the primary surface sheet is made from a very thin material. Thus, as the primary surface recuperator cycles, the temperature of the primary surface sheet increases in temperature and decreases in temperature during the cycling. This results in the primary surface sheet experiencing a high degree of thermal deformation.

Abstract: Primary surface recuperators generally undergo severe thermal and pressure cycles. Thermal cycling tends to cause the primary surface recuperator to expand along a central axis. However ducting connected with the primary surface recuperator tends to limit its expansion. Constructing bars in cells of the primary surface recuperator from the same material as the ducting tends to reduce thermal stresses that may otherwise result from difference in thermal expansion.

Abstract: A multiposition readable trim position indicator for outboard motors or the like for determining the tilt or angularity of the propeller with respect to a parallel position to the water level. The trim position indicator is attached to the side of the top cover of the outboard motor to give an indication of the angle between the axis of the outboard motor propeller and the water surface. When the outboard motor is tilted, e.g. as the boat comes up to planing speed, the trim position indicator indicates the angular degree of tilt by means of a level-seeking mechanism therein which no longer is centered between two indicator markings. Consequently, appropriate trimming measures may be taken so that maximum propulsion is restored. Due to its unique design, the pointer face of this trim position indicator is readable from both a sitting position and a standing position in the boat. Methods of mounting the trim position indicator on outboard motors both with and without hydrofoil stabilizers are also provided.

Abstract: A non-volatile memory and method is described incorporating an array of variable threshold transistors, a row decoder, a buffer circuit positioned between the array and row decode circuitry, column decode circuitry, and a sense amplifier. The non-volatile memory overcomes the problem of high voltages in the memory array during READ operation. During READ operation the variable threshold transistors operate in the common source mode. A buffer circuit with level shift capability is described incorporating P and N channel transistors. A sense amplifier with decoupling during sensing or lock out is described incorporating P and N channel transistors.

Abstract: A radiation hardened drain-source protected MNOS transistor is disclosed. A layer of silicon oxide overlies the channel and the junctions formed by the intersections of the drain and source regions with the channel. Drain and source protection is provided by relatively thick portions of the silicon oxide layer which overlie the junctions formed by the drain and source regions and the channel. The portion of the silicon oxide layer overlying the central section of the channel is thinner than the remainder of this layer.A silicon nitride layer and an electrically conductive layer forming the gate electrode overlie the thinner portion of the silicon oxide layer to complete the MNOS transistor. The conductive layer forming gate electrode of the transistor is in electrical contact with both the silicon nitride and the silicon oxide layers.

Abstract: A complementary MOS voltage level shift circuit which can be used as a memory buffer circuit, for example, is disclosed. The circuit utilizes both N-channel depletion mode devices and P-channel enhancement mode MOS devices preferably fabricated on silicon-on-sapphire. Both types of devices are operated with only negative or zero gate-source voltage in order to minimize threshold voltage shifts in radiation environments. A capacitive voltage level shifting technique is used to obtain push-pull operation with driver type devices in order to reduce power consumption and increase switching speed while feeding into a capacitive load. Load type devices are used to prevent discharge of a capacitive load.

Abstract: A complementary MOS logic circuit is disclosed. The circuit utilizes two stages with a coupling network comprising a capacitor and a diode used to couple the first stage to the second stage. This results in a circuit with the logic signal coupled to the input being inverted at the output without introducing substantial loss in signal amplitude.

Abstract: An MOS transistor constructed using silicon on sapphire technology in which the channel region can be electrically connected either to the source or drain terminal is disclosed. The transistor is advantageous in that the shift of the threshold voltage of the transistor in the presence of radiation is substantially decreased. Connecting the channel region of the transistor to the source terminal also substantially reduces what is normally referred to as the "kink" effect in MOS transistors utilizing floating substrate channel regions. Reducing the sensitivity to radiation and the kink effect results in a transistor having improved electrical characteristics.