Patents by Inventor Michael D. Hutchison

Michael D. Hutchison has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9935707
    Abstract: A method for transmitting and coherently detecting data transmitted over electrical lanes that experience different amounts of skew includes, at a traffic generation or forwarding device, self calibrating transmit and receive-side components of the traffic generation or forwarding device to account for skew between electrical lanes and setting per-electrical lane delays based on the calibration. Data to be transmitted to a network device is generated. The data to be transmitted is spread, using one of the transmit-side components, over a first number of electrical lanes. The data is multiplexed from the electrical lanes onto a second number of optical lanes, the second number being different from the first number. Data is transmitted to and received from the network device over the optical lanes. Transmitted data is reconstructed from the received data using the receive-side components.
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: April 3, 2018
    Assignee: KEYSIGHT TECHNOLOGIES SINGAPORE (HOLDINGS) PTE. LTD
    Inventors: Gerald Raymond Pepper, Michael D. Hutchison
  • Patent number: 9806980
    Abstract: Methods, systems, and computer readable media for precise measurement of switching latency of packet switching devices are disclosed. One method includes steps implemented in a network equipment test device including at least one processor. The method includes transmitting frames to a device under test. The method further includes receiving one of the transmitted frames from the device under test. The method further includes determining a measured latency of the device under test based on a difference between a time that the one frame was transmitted to the device under test and a time that the one frame was received from the device under test. The method further includes determining an indication of backlog latency of the device under test caused by the device under test inserting a virtual lane marker in traffic transmitted to the network equipment and reporting the indication of the backlog latency.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: October 31, 2017
    Assignee: Ixia
    Inventors: Michael D. Hutchison, Christopher M. Kowalski
  • Publication number: 20170099101
    Abstract: A method for transmitting and coherently detecting data transmitted over electrical lanes that experience different amounts of skew includes, at a traffic generation or forwarding device, self calibrating transmit and receive-side components of the traffic generation or forwarding device to account for skew between electrical lanes and setting per-electrical lane delays based on the calibration. Data to be transmitted to a network device is generated. The data to be transmitted is spread, using one of the transmit-side components, over a first number of electrical lanes. The data is multiplexed from the electrical lanes onto a second number of optical lanes, the second number being different from the first number. Data is transmitted to and received from the network device over the optical lanes. Transmitted data is reconstructed from the received data using the receive-side components.
    Type: Application
    Filed: October 3, 2016
    Publication date: April 6, 2017
    Inventors: Gerald Raymond Pepper, Michael D. Hutchison
  • Patent number: 9172647
    Abstract: There are disclosed a system, a test head and a method for testing a device under test. Two or more test heads may be mated directly with respective connectors on the device under test. Each test head may include a traffic generator including a stateless packet builder to generate stateless traffic for transmission to the device under test, and a traffic receiver including a stateless packet analyzer to accumulate traffic statistics on stateless traffic received from the device under test. A server coupled to the two or more test heads via respective communications links, may generate stateful traffic for transmission to the device under test by the two or more test heads, and may process stateful traffic received from the device under test by the two or more test heads.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: October 27, 2015
    Assignee: Ixia
    Inventors: Chiat Earl Chew, Michael D. Hutchison
  • Publication number: 20150281027
    Abstract: Methods, systems, and computer readable media for precise measurement of switching latency of packet switching devices are disclosed. One method includes steps implemented in a network equipment test device including at least one processor. The method includes transmitting frames to a device under test. The method further includes receiving one of the transmitted frames from the device under test. The method further includes determining a measured latency of the device under test based on a difference between a time that the one frame was transmitted to the device under test and a time that the one frame was received from the device under test. The method further includes determining an indication of backlog latency of the device under test caused by the device under test inserting a virtual lane marker in traffic transmitted to the network equipment and reporting the indication of the backlog latency.
    Type: Application
    Filed: March 27, 2014
    Publication date: October 1, 2015
    Inventors: Michael D. Hutchison, Christopher M. Kowalski
  • Patent number: 9088520
    Abstract: An impairment unit and method of emulating network impairments is disclosed. The impairment unit may receive network traffic and transmit impaired network traffic. Received packets may be stored in a memory physically partitioned into a plurality of memory blocks and logically partitioned into a plurality of buffers. At least one buffer may be associated with each of a plurality of predefined impairment classes. One or more buffer may be a limited-length queue. Memory blocks may be assigned to buffers on an as-needed basis. A classifier may determine respective impairment classes of the received packets. A number of memory blocks assigned to each limited-length queue may be limited to a respective predetermined maximum. An enqueue manager may store each received packet and associated metadata in the buffer associated with the respective impairment class. The enqueue manager may discard received packets if the associated limited-length queue is full.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: July 21, 2015
    Assignee: Ixia
    Inventors: Michael D. Hutchison, Chiat Earl Chew
  • Publication number: 20140321285
    Abstract: There are disclosed a system, a test head and a method for testing a device under test. Two or more test heads may be mated directly with respective connectors on the device under test. Each test head may include a traffic generator including a stateless packet builder to generate stateless traffic for transmission to the device under test, and a traffic receiver including a stateless packet analyzer to accumulate traffic statistics on stateless traffic received from the device under test. A server coupled to the two or more test heads via respective communications links, may generate stateful traffic for transmission to the device under test by the two or more test heads, and may process stateful traffic received from the device under test by the two or more test heads.
    Type: Application
    Filed: April 25, 2013
    Publication date: October 30, 2014
    Inventors: Chiat Earl Chew, Michael D. Hutchison
  • Publication number: 20130070584
    Abstract: An impairment unit and method of emulating network impairments is disclosed. The impairment unit may receive network traffic and transmit impaired network traffic. Received packets may be stored in a memory physically partitioned into a plurality of memory blocks and logically partitioned into a plurality of buffers. At least one buffer may be associated with each of a plurality of predefined impairment classes. One or more buffer may be a limited-length queue. Memory blocks may be assigned to buffers on an as-needed basis. A classifier may determine respective impairment classes of the received packets. A number of memory blocks assigned to each limited-length queue may be limited to a respective predetermined maximum. An enqueue manager may store each received packet and associated metadata in the buffer associated with the respective impairment class. The enqueue manager may discard received packets if the associated limited-length queue is full.
    Type: Application
    Filed: September 26, 2012
    Publication date: March 21, 2013
    Inventors: Michael D. Hutchison, Chiat Earl Chew