Patents by Inventor Michael D. Hyatt
Michael D. Hyatt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10217706Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.Type: GrantFiled: August 24, 2017Date of Patent: February 26, 2019Assignee: Micron Technology, Inc.Inventors: Vishal Sipani, Kyle Armstrong, Michael D. Hyatt, Michael Dean Van Patten, David A. Kewley, Ming-Chuan Yang
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Publication number: 20170352616Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.Type: ApplicationFiled: August 24, 2017Publication date: December 7, 2017Applicant: Micron Technology, Inc.Inventors: Vishal Sipani, Kyle Armstrong, Michael D. Hyatt, Michael Dean Van Patten, David A. Kewley, Ming-Chuan Yang
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Patent number: 9780029Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.Type: GrantFiled: April 29, 2015Date of Patent: October 3, 2017Assignee: Micron Technology, Inc.Inventors: Vishal Sipani, Kyle Armstrong, Michael D. Hyatt, Michael Dean Van Patten, David A. Kewley, Ming-Chuan Yang
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Patent number: 9358753Abstract: Substrates and methods of forming a pattern on a substrate. The pattern includes a repeating pattern region and a pattern-interrupting region adjacent to the repeating pattern region. A mask is formed on the substrate, with the mask including the repeating pattern region and the pattern-interrupting region and which are formed using two separate masking steps. The mask is used in forming the pattern into underlying substrate material on which the mask is received. Substrates comprising masks are also disclosed.Type: GrantFiled: July 1, 2015Date of Patent: June 7, 2016Assignee: Micron Technology, Inc.Inventors: Vishal Sipani, David A. Kewley, Kyle Armstrong, Michael Dean Van Patten, Michael D. Hyatt
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Patent number: 9330914Abstract: A method including forming a line pattern in a substrate includes using a plurality of longitudinally spaced projecting features formed along respective guide lines as a template in forming a plurality of directed self-assembled (DSA) lines that individually comprise at least one of (a): the spaced projecting features and DSA material longitudinally there-between, and (b): are laterally between and laterally spaced from immediately adjacent of the guide lines. Substrate material elevationally inward of and laterally between the DSA lines may be processed using the DSA lines as a mask.Type: GrantFiled: October 8, 2013Date of Patent: May 3, 2016Assignee: Micron Technology, Inc.Inventors: Scott L. Light, Vishal Sipani, Michael D. Hyatt
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Publication number: 20150321447Abstract: Substrates and methods of forming a pattern on a substrate. The pattern includes a repeating pattern region and a pattern-interrupting region adjacent to the repeating pattern region. A mask is formed on the substrate, with the mask including the repeating pattern region and the pattern-interrupting region and which are formed using two separate masking steps. The mask is used in forming the pattern into underlying substrate material on which the mask is received. Substrates comprising masks are also disclosed.Type: ApplicationFiled: July 1, 2015Publication date: November 12, 2015Inventors: Vishal Sipani, David A. Kewley, Kyle Armstrong, Michael Dean Van Patten, Michael D. Hyatt
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Publication number: 20150235938Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.Type: ApplicationFiled: April 29, 2015Publication date: August 20, 2015Inventors: Vishal Sipani, Kyle Armstrong, Michael D. Hyatt, Michael Dean Van Patten, David A. Kewley, Ming-Chuan Yang
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Patent number: 9102121Abstract: Substrates and methods of forming a pattern on a substrate. The pattern includes a repeating pattern region and a pattern-interrupting region adjacent to the repeating pattern region. A mask is formed on the substrate, with the mask including the repeating pattern region and the pattern-interrupting region and which are formed using two separate masking steps. The mask is used in forming the pattern into underlying substrate material on which the mask is received. Substrates comprising masks are also disclosed.Type: GrantFiled: May 3, 2012Date of Patent: August 11, 2015Assignee: Micron Technology, Inc.Inventors: Vishal Sipani, David A. Kewley, Kyle Armstrong, Michael Dean Van Patten, Michael D. Hyatt
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Patent number: 9048292Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.Type: GrantFiled: October 25, 2012Date of Patent: June 2, 2015Assignee: Micron Technology, Inc.Inventors: Vishal Sipani, Kyle Armstrong, Michael D. Hyatt, Michael Dean Van Patten, David A. Kewley, Ming-Chuan Yang
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Publication number: 20150099362Abstract: A method including forming a line pattern in a substrate includes using a plurality of longitudinally spaced projecting features formed along respective guide lines as a template in forming a plurality of directed self-assembled (DSA) lines that individually comprise at least one of (a): the spaced projecting features and DSA material longitudinally there-between, and (b): are laterally between and laterally spaced from immediately adjacent of the guide lines. Substrate material elevationally inward of and laterally between the DSA lines may be processed using the DSA lines as a mask.Type: ApplicationFiled: October 8, 2013Publication date: April 9, 2015Applicant: Micron Technology, Inc.Inventors: Scott L. Light, Vishal Sipani, Michael D. Hyatt
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Patent number: 8969214Abstract: A method of forming a pattern on a substrate includes forming spaced first features derived from a first lithographic patterning step. Sidewall spacers are formed on opposing sides of the first features. After forming the sidewall spacers, spaced second features derived from a second lithographic patterning step are formed. At least some of individual of the second features are laterally between and laterally spaced from immediately adjacent of the first features in at least one straight-line vertical cross-section that passes through the first and second features. After the second lithographic patterning step, all of only some of the sidewall spacers in said at least one cross-section is removed.Type: GrantFiled: May 14, 2013Date of Patent: March 3, 2015Assignee: Micron Technology, Inc.Inventors: Scott L. Light, Kyle Armstrong, Michael D. Hyatt, Vishal Sipani
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Publication number: 20150015860Abstract: A method of mitigating asymmetric lens heating in photolithographically patterning a photo-imageable material using a reticle includes determining where first hot spot locations are expected to occur on a lens when using a reticle to pattern a photo-imageable material. The reticle is then fabricated to include non-printing features within a non-printing region of the reticle which generate additional hot spot locations on the lens when using the reticle to pattern the photo-imageable material. Other implementations are contemplated, including reticles which may be independent of method of use or fabrication.Type: ApplicationFiled: September 29, 2014Publication date: January 15, 2015Inventors: Scott L. Light, Dan Millward, Yuan He, Kaveri Jain, Lijing Gou, Zishu Zhang, Anton J. deVilliers, Michael D. Hyatt, Jianming Zhou
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Publication number: 20140342563Abstract: A method of forming a pattern on a substrate includes forming spaced first features derived from a first lithographic patterning step. Sidewall spacers are formed on opposing sides of the first features. After forming the sidewall spacers, spaced second features derived from a second lithographic patterning step are formed. At least some of individual of the second features are laterally between and laterally spaced from immediately adjacent of the first features in at least one straight-line vertical cross-section that passes through the first and second features. After the second lithographic patterning step, all of only some of the sidewall spacers in said at least one cross-section is removed.Type: ApplicationFiled: May 14, 2013Publication date: November 20, 2014Applicant: Micron Technology, Inc.Inventors: Scott L. Light, Kyle Armstrong, Michael D. Hyatt, Vishal Sipani
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Patent number: 8728721Abstract: A method of processing a substrate includes forming first photoresist on a substrate. A portion of the first photoresist is selectively exposed to actinic energy and then the first photoresist is negative tone developed to remove an unexposed portion of the first photoresist. Second photoresist is formed on the substrate over the developed first photoresist. A portion of the second photoresist is selectively exposed to actinic energy and then the second photoresist is negative tone developed to remove an unexposed portion of the second photoresist and form a pattern on the substrate which comprises the developed first photoresist and the developed second photoresist. Other implementations are disclosed.Type: GrantFiled: August 8, 2011Date of Patent: May 20, 2014Assignee: Micron Technology, Inc.Inventors: Scott L. Light, Kaveri Jain, Zishu Zhang, Anton J deVilliers, Dan Millward, Jianming Zhou, Michael D. Hyatt
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Publication number: 20140117529Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.Type: ApplicationFiled: October 25, 2012Publication date: May 1, 2014Applicant: MICRON TECHNOLOGY, INC.Inventors: Vishal Sipani, Kyle Armstrong, Michael D. Hyatt, Michael Dean Van Patten, David A. Kewley, Ming-Chuan Yang
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Publication number: 20130302981Abstract: Some embodiments include methods of forming patterns. A semiconductor substrate is formed to comprise an electrically insulative material over a set of electrically conductive structures. An interconnect region is defined across the electrically conductive structures, and regions on opposing sides of the interconnect region are defined as secondary regions. A two-dimensional array of features is formed over the electrically insulative material. The two-dimensional array extends across the interconnect region and across the secondary regions. A pattern of the two-dimensional array is transferred through the electrically insulative material of the interconnect region to form contact openings that extend through the electrically insulative material and to the electrically conductive structures, and no portions of the two-dimensional array of the secondary regions is transferred into the electrically insulative material.Type: ApplicationFiled: July 15, 2013Publication date: November 14, 2013Inventors: Dan Millward, Kaveri Jain, Zishu Zhang, Lijing Gou, Anton J. deVilliers, Jianming Zhou, Yuan He, Michael D. Hyatt, Scott L. Light
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Publication number: 20130295335Abstract: Substrates and methods of forming a pattern on a substrate. The pattern includes a repeating pattern region and a pattern-interrupting region adjacent to the repeating pattern region. A mask is formed on the substrate, with the mask including the repeating pattern region and the pattern-interrupting region and which are formed using two separate masking steps. The mask is used in forming the pattern into underlying substrate material on which the mask is received. Substrates comprising masks are also disclosed.Type: ApplicationFiled: May 3, 2012Publication date: November 7, 2013Applicant: MICRON TECHNOLOGY, INC.Inventors: Vishal Sipani, David A. Kewley, Kyle Armstrong, Michael Dean Van Patten, Michael D. Hyatt
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Publication number: 20130040245Abstract: A method of processing a substrate includes forming first photoresist on a substrate. A portion of the first photoresist is selectively exposed to actinic energy and then the first photoresist is negative tone developed to remove an unexposed portion of the first photoresist. Second photoresist is formed on the substrate over the developed first photoresist. A portion of the second photoresist is selectively exposed to actinic energy and then the second photoresist is negative tone developed to remove an unexposed portion of the second photoresist and form a pattern on the substrate which comprises the developed first photoresist and the developed second photoresist. Other implementations are disclosed.Type: ApplicationFiled: August 8, 2011Publication date: February 14, 2013Inventors: Scott L. Light, Kaveri Jain, Zishu Zhang, Anton J. de Villiers, Dan Millward, Jianming Zhou, Michael D. Hyatt