Patents by Inventor Michael D. Kenney

Michael D. Kenney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984364
    Abstract: Semiconductor devices having measurement features and associated systems and methods are disclosed herein. In one embodiment, a semiconductor device includes a plurality of stacked semiconductor dies each having measurement features formed along an outer periphery of a surface thereof. One or more image capture devices can image the semiconductor device and a controller can detect the measurement features in imaging data received from the image capture devices. The controller can further determine the distance between two or more of the measurement features to estimate a bond line thickness between semiconductor dies in the stack.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: May 14, 2024
    Inventors: Anilkumar Chandolu, Lisa R. Copenspire-Ross, Michael D. Kenney
  • Publication number: 20210225715
    Abstract: Semiconductor devices having measurement features and associated systems and methods are disclosed herein. In one embodiment, a semiconductor device includes a plurality of stacked semiconductor dies each having measurement features formed along an outer periphery of a surface thereof. One or more image capture devices can image the semiconductor device and a controller can detect the measurement features in imaging data received from the image capture devices. The controller can further determine the distance between two or more of the measurement features to estimate a bond line thickness between semiconductor dies in the stack.
    Type: Application
    Filed: March 22, 2021
    Publication date: July 22, 2021
    Inventors: Anilkumar Chandolu, Lisa R. Copenspire-Ross, Michael D. Kenney
  • Patent number: 10971409
    Abstract: Semiconductor devices having measurement features and associated systems and methods are disclosed herein. In one embodiment, a semiconductor device includes a plurality of stacked semiconductor dies each having measurement features formed along an outer periphery of a surface thereof. One or more image capture devices can image the semiconductor device and a controller can detect the measurement features in imaging data received from the image capture devices. The controller can further determine the distance between two or more of the measurement features to estimate a bond line thickness between semiconductor dies in the stack.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: April 6, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Anilkumar Chandolu, Lisa R. Copenspire-Ross, Michael D. Kenney
  • Publication number: 20200211912
    Abstract: Semiconductor devices having measurement features and associated systems and methods are disclosed herein. In one embodiment, a semiconductor device includes a plurality of stacked semiconductor dies each having measurement features formed along an outer periphery of a surface thereof. One or more image capture devices can image the semiconductor device and a controller can detect the measurement features in imaging data received from the image capture devices. The controller can further determine the distance between two or more of the measurement features to estimate a bond line thickness between semiconductor dies in the stack.
    Type: Application
    Filed: December 27, 2018
    Publication date: July 2, 2020
    Inventors: Anilkumar Chandolu, Lisa R. Copenspire-Ross, Michael D. Kenney
  • Patent number: 6819125
    Abstract: The present invention provides a method and apparatus for detecting and locating a fault in an integrated circuit structure formed in one or more insulating layers deployed on a semiconductor substrate. The apparatus includes a probe tool capable of detecting a fault in the integrated circuit structure, a laser tool capable of forming an electrical connection between the integrated circuit structure and the semiconductor substrate, and a controller coupled to the probe tool and the laser tool, wherein the controller is capable of directing the laser tool to form the electrical connection between the integrated circuit structure and the semiconductor substrate in response to detecting the fault in the integrated circuit structure.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: November 16, 2004
    Assignee: Micron Technology, Inc.
    Inventors: James E. Green, Nicholas E. Paulin, Justin R. Arrington, Michael D. Kenney