Patents by Inventor Michael D. Tucknott

Michael D. Tucknott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for bus lock assistance
    Patent number: 10678712
    Abstract: A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: June 9, 2020
    Assignee: Intel Corporation
    Inventors: Robert S. Chappell, John W. Faistl, Hermann W. Gartler, Michael D. Tucknott, Rajesh S. Parthasarathy, David W. Burns
  • METHOD AND APPARATUS FOR BUS LOCK ASSISTANCE
    Publication number: 20190188158
    Abstract: A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
    Type: Application
    Filed: February 11, 2019
    Publication date: June 20, 2019
    Inventors: Robert S. Chappell, John W. FAISTL, Hermann W. GARTLER, Michael D. TUCKNOTT, Rajesh S. PARTHASARATHY, David W. Burns
  • Method and apparatus for bus lock assistance
    Patent number: 10216650
    Abstract: A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: February 26, 2019
    Assignee: Intel Corporation
    Inventors: Robert S. Chappell, John W. Faistl, Hermann W. Gartler, Michael D. Tucknott, Rajesh S. Parthasarathy, David W. Burns
  • METHOD AND APPARATUS FOR BUS LOCK ASSISTANCE
    Publication number: 20180225228
    Abstract: A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
    Type: Application
    Filed: January 29, 2018
    Publication date: August 9, 2018
    Inventors: ROBERT S. CHAPPELL, JOHN W. FAISTL, HERMANN W. GARTLER, MICHAEL D. TUCKNOTT, RAJESH S. PARTHASARATHY, DAVID W. BURNS
  • Method and apparatus for bus lock assistance
    Patent number: 9880948
    Abstract: A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: January 30, 2018
    Assignee: INTEL CORPORATION
    Inventors: Robert S. Chappell, John W. Faistl, Hermann W. Gartler, Michael D. Tucknott, Rajesh S. Parthasarathy, David W. Burns
  • METHOD AND APPARATUS FOR BUS LOCK ASSISTANCE
    Publication number: 20170097902
    Abstract: A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
    Type: Application
    Filed: December 19, 2016
    Publication date: April 6, 2017
    Inventors: ROBERT S. CHAPPELL, JOHN W. FAISTL, HERMANN W. GARTLER, MICHAEL D. TUCKNOTT, RAJESH S. PARTHASARATHY, DAVID W. BURNS
  • Method and apparatus for bus lock assistance
    Patent number: 9524263
    Abstract: A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: December 20, 2016
    Assignee: Intel Corporation
    Inventors: Robert S. Chappell, John W. Faistl, Hermann W. Gartler, Michael D. Tucknott, Rajesh S. Parathasarthy, David W. Burns
  • Method and Apparatus For Bus Lock Assistance
    Publication number: 20140006661
    Abstract: A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 2, 2014
    Inventors: Robert S. Chappell, John W. Faistl, Hermann W. Gartler, Michael D. Tucknott, Rajesh S. Parathasarthy, David W. Burns
  • Regulating atomic memory operations to prevent denial of service attack
    Patent number: 8516577
    Abstract: In one embodiment, the present invention includes a method for identifying a termination sequence for an atomic memory operation executed by a first thread, associating a timer with the first thread, and preventing the first thread from execution of a memory cluster operation after completion of the atomic memory operation until a prevention window has passed. This method may be executed by regulation logic associated with a memory execution unit of a processor, in some embodiments. Other embodiments are described and claimed.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: August 20, 2013
    Assignee: Intel Corporation
    Inventors: Michael S. Bair, David W. Burns, Robert S. Chappell, Prakash Math, Leslie A. Ong, Pankaj Raghuvanshi, Shlomo Raikin, Raanan Sade, Michael D. Tucknott, Igor Yanover
  • REGULATING ATOMIC MEMORY OPERATIONS TO PREVENT DENIAL OF SERVICE ATTACK
    Publication number: 20120072984
    Abstract: In one embodiment, the present invention includes a method for identifying a termination sequence for an atomic memory operation executed by a first thread, associating a timer with the first thread, and preventing the first thread from execution of a memory cluster operation after completion of the atomic memory operation until a prevention window has passed. This method may be executed by regulation logic associated with a memory execution unit of a processor, in some embodiments. Other embodiments are described and claimed.
    Type: Application
    Filed: September 22, 2010
    Publication date: March 22, 2012
    Inventors: MICHAEL S. BAIR, David W. Burns, Robert S. Chappell, Prakash Math, Leslie A. Ong, Pankaj Raghuvanshi, Shlomo Raikin, Raanan Sade, Michael D. Tucknott, Igor Yanover