Patents by Inventor Michael David Jager

Michael David Jager has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240038672
    Abstract: A package comprising a substrate comprising at least one dielectric layer and a plurality of interconnects; a first integrated device coupled to the substrate through a first plurality of solder interconnects, wherein the first plurality of solder interconnects includes a first plurality of inner solder interconnects and a first plurality of perimeter solder interconnects; and a second integrated device coupled to the substrate through a second plurality of solder interconnects. The first integrated device is configured to be electrically coupled to the second integrated device through an electrical path. The electrical path comprises an inner solder interconnect from the first plurality of inner solder interconnects, at least one interconnect from the plurality of interconnects, and a solder interconnect from the second plurality of solder interconnects.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Inventors: Mahalingam NAGARAJAN, Vaishnav SRINIVAS, Nitin JUNEJA, Christophe AVOINNE, Xavier Loic LELOUP, Michael David JAGER, Charles David PAYNTER, Joon Young PARK
  • Patent number: 11662765
    Abstract: A method for providing low latency frequency switching includes operating a first processing component on a first die and operating a second processing component on a second die with the same first clock signal having a first frequency. A request to switch the first frequency to a second, new frequency is received and a second clock signal having the second, new frequency is produced. Data flow between the first die and second die may be stopped. And then the second clock signal is transmitted to a dual phased locked loop architecture on a die interface. A PCLK signal is created from the combined first and second clock signals and an NCLK signal is created from the second clock signal. Next, the PCLK signal is divided and aligned with the NCLK signal. Once the PCLK signal is aligned with the NCLK signal, data flow is resumed between the two dies.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: May 30, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Mahalingam Nagarajan, Vaishnav Srinivas, Christophe Avoinne, Xavier Loic Leloup, Michael David Jager
  • Publication number: 20100146313
    Abstract: A method comprising: sensing an ambient temperature at an electronic apparatus; and switching between a first processing mode of the electronic apparatus and a second processing mode of the electronic device, in response to an increase in the ambient temperature above a threshold.
    Type: Application
    Filed: December 27, 2006
    Publication date: June 10, 2010
    Applicant: NOKIA CORPORATION
    Inventor: Michael David Jager
  • Patent number: 6330433
    Abstract: Apparatus and method are described for selecting for subsequent use an antenna from a plurality of antennas. The selection is biased in favor of the antenna most likely to receive subsequent signals having best signal quality. In a preferred embodiment the signal quality comprises received signal strength.
    Type: Grant
    Filed: March 25, 1997
    Date of Patent: December 11, 2001
    Assignee: Nokia Mobile Phones Limited
    Inventor: Michael David Jager
  • Patent number: 6067449
    Abstract: Antenna selection control apparatus for a diversity antenna system including at least two antennas. The received power strength is measured from a selected antenna and compared with a reference power level. The reference power level is adjusted depending upon the signal to noise ratio of received signals, and if the selected antenna falls below the adjusted threshold another antenna is selected.
    Type: Grant
    Filed: December 10, 1996
    Date of Patent: May 23, 2000
    Assignee: Nokia Mobile Phones Limited
    Inventor: Michael David Jager
  • Patent number: 5754595
    Abstract: A received and demodulated multi-level signal (32) is corrected for D.C. offset by a feedback loop (34) which applies a correction signal (38) to the multi-level signal (32). Initial coarse correction is provided by feeding the corrected signal (42) into the feedback loop where a low pass filter (36) averages the corrected signal over time and detects departure from zero of this time-averaged signal. After initial coarse correction, finer correction of D.C. offset is provided in a data-aided mode in which detected data values (46) are fed into the feedback loop (34). The method achieves D.C. offset correction without the need to know anything about the data pattern of the received signal (32).
    Type: Grant
    Filed: April 19, 1996
    Date of Patent: May 19, 1998
    Assignee: Nokia Mobile Phones Limited
    Inventors: Zhi-Chun Honkasalo (nee Zhu), Michael David Jager, Harri Honkasalo