Abstract: There is disclosed apparatus and methods of multicasting in a shared address space. A shared memory address space may include two or more multicast portions. Each multicast portion may be associated with a respective end point and with at least one other multicast portion. Data units may be transmitted to at least some of the end points via memory-mapped I/O into the shared memory address space. When a destination address of a data unit is in a first multicast portion associated with a first end point, the data unit may be transmitted to the first end point, revised to specify a destination address in a second multicast portion associated with the first multicast portion, and transmitted to a second end point associated with the second multicast portion.

Abstract: A wireless access point with a centralized media access controller MAC (402) that enables multiple radios (404, 412, 408) to share MAC resources and implement load balancing and frequency control.

Abstract: A system of at least one wireless access device in a local area network (LAN) having a plurality of transceivers. Each transceiver has a directional antenna positioned in a substantially circular array to communicate signals with a plurality of stations in a corresponding sector. Each sector defines a portion of a coverage area surrounding the wireless access device. The wireless access device has a network interface to a data network, and an array controller to control communication of data between the stations and the transceivers, and between the transceivers and the network interface. The array controller is configured to modify channel assignments so as to minimize channel interference dynamically.

Abstract: There is disclosed apparatus and methods of multicasting in a shared address space. A shared memory address space may include two or more multicast portions. Each multicast portion may be associated with a respective end point and with at least one other multicast portion. Data units may be transmitted to at least some of the end points via memory-mapped I/O into the shared memory address space. When a destination address of a data unit is in a first multicast portion associated with a first end point, the data unit may be transmitted to the first end point, revised to specify a destination address in a second multicast portion associated with the first multicast portion, and transmitted to a second end point associated with the second multicast portion.

Abstract: A wireless access point with a centralized media access controller MAC (402) that enables multiple radios (404, 412, 408) to share MAC resources and implement load balancing and frequency control.

Abstract: A system of at least one wireless access device in a local area network (LAN) having a plurality of transceivers. Each transceiver has a directional antenna positioned in a substantially circular array to communicate signals with a plurality of stations in a corresponding sector. Each sector defines a portion of a coverage area surrounding the wireless access device. The wireless access device has a network interface to a data networks and an array controller to control communication of data between the stations and the transceivers, and between the transceivers and the network interface. The array controller is configured to modify channel assignments so as to minimize channel interference dynamically.

Abstract: A system of at least one wireless access device in a local area network (LAN) having a plurality of transceivers. Each transceiver has a directional antenna positioned in a substantially circular array to communicate signals with a plurality of stations in a corresponding sector. Each sector defines a portion of a coverage area surrounding the wireless access device. The wireless access device has a network interface to a data network, and an array controller to control communication of data between the stations and the transceivers, and between the transceivers and the network interface. The array controller is configured to modify channel assignments so as to minimize channel interference dynamically.

Abstract: A wireless access device in a local area network (LAN) having a plurality of transceivers. Each transceiver has a directional antenna positioned in a substantially circular array to communicate signals with a plurality of stations in a corresponding sector. Each sector defines a portion of a coverage area surrounding the wireless access device. The wireless access device has a network interface to a data network, and an array controller to control communication of data between the stations and the transceivers, and between the transceivers and the network interface. The array controller is configured to modify channel assignments so as to minimize channel interference dynamically.

Abstract: A system of at least one wireless access device in a local area network (LAN) having a plurality of transceivers. Each transceiver has a directional antenna positioned in a substantially circular array to communicate signals with a plurality of stations in a corresponding sector. Each sector defines a portion of a coverage area surrounding the wireless access device. The wireless access device has a network interface to a data network, and an array controller to control communication of data between the stations and the transceivers, and between the transceivers and the network interface. The array controller is configured to modify channel assignments so as to minimize channel interference dynamically.

Abstract: A wireless access device in a local area network (LAN) having a plurality of transceivers. Each transceiver has a directional antenna positioned in a substantially circular array to communicate signals with a plurality of stations in a corresponding sector. Each sector defines a portion of a coverage area surrounding the wireless access device. The wireless access device has a network interface to a data network, and an array controller to control communication of data between the stations and the transceivers, and between the transceivers and the network interface. The array controller is configured to modify channel assignments so as to minimize channel interference dynamically.

Abstract: A wireless access device in a local area network (LAN) having a plurality of transceivers. Each transceiver has a directional antenna positioned in a substantially circular array to communicate signals with a plurality of stations in a corresponding sector. Each sector defines a portion of a coverage area surrounding the wireless access device. The wireless access device has a network interface to a data network, and an array controller to control communication of data between the stations and the transceivers, and between the transceivers and the network interface.

Abstract: A wireless access device in a local area network (LAN) having a plurality of transceivers. Each transceiver has a directional antenna positioned in a substantially circular array to communicate signals with a plurality of stations in a corresponding sector. Each sector defines a portion of a coverage area surrounding the wireless access device. The wireless access device has a network interface to a data network, and an array controller to control communication of data between the stations and the transceivers, and between the transceivers and the network interface.

Abstract: A network processor having bypass capability in which some data units are diverted from being processed by the processor core of the network processor. In one embodiment, a network processor may include a receiver to receive data units, configuration information used to evaluate whether the data units require processing, a processor core to process data units that require processing, a bypass store to hold those data units which do not require processing by the processor core, and a transmitter to transmit the data units. In one embodiment, a method may include receiving a plurality of data units, receiving configuration information, evaluating whether each of the data units requires processing based on the configuration information, bypassing processing those of the data units that do not require processing based on the evaluating, processing those of the data units that require processing based on the evaluating, and transmitting the data units.

Abstract: Methods for routing data units and PCI Express switches are disclosed. A plurality of devices may be coupled to a corresponding plurality of physical interfaces, each physical interface having a respective configurable status and a respective address domain, wherein in a first status the interface is transparent, and in a second status the interface is non-transparent. The status of each of the plurality of physical interfaces may be set as transparent or non-transparent. Data units may be switched between the physical interfaces using mapped address input/output, switching data units including masking the address domain for the interfaces configured as non-transparent.

Abstract: Methods for routing data units and PCI Express switches are disclosed. A plurality of devices may be coupled to a corresponding plurality of physical interfaces, each physical interface having a respective configurable status and a respective address domain, wherein in a first status the interface is transparent, and in a second status the interface is non-transparent. The status of each of the plurality of physical interfaces may be set as transparent or non-transparent. Data units may be switched between the physical interfaces using mapped address input/output, switching data units including masking the address domain for the interfaces configured as non-transparent.

Abstract: There are disclosed apparatus and methods for switching. Transparent and non-transparent ports are provided. Data units are transferred between the transparent ports, between the transparent and non-transparent ports, and between the non-transparent ports.

Abstract: There is disclosed a bus optimization technique. Pursuant to the bus optimization technique, the output buffer and output logic are removed from port units of a switch and are included with a control matrix in the switch. Data units received in a first port unit of a plurality of port units are provided to a control matrix. The control matrix evaluates when to send the data unit to a second port unit. No output decisions are made in the second port unit.

Abstract: There is disclosed apparatus and methods of multicasting in a shared address space. A shared memory address space may include two or more multicast portions. Each multicast portion may be associated with a respective end point and with at least one other multicast portion. Data units may be transmitted to at least some of the end points via memory-mapped I/O into the shared memory address space. When a destination address of a data unit is in a first multicast portion associated with a first end point, the data unit may be transmitted to the first end point, revised to specify a destination address in a second multicast portion associated with the first multicast portion, and transmitted to a second end point associated with the second multicast portion.

Abstract: There is disclosed apparatus and methods of multicasting in a shared address space. There may be defined a number of portions of the address space. There may be groups of the portions, and data units addressed to one portion within the group may be re-addressed to the other portions.

Abstract: A wireless access device in a local area network (LAN) having a plurality of transceivers. Each transceiver has a directional antenna positioned in a substantially circular array to communicate signals with a plurality of stations in a corresponding sector. Each sector defines a portion of a coverage area surrounding the wireless access device. The wireless access device has a network interface to a data network, and an array controller to control communication of data between the stations and the transceivers, and between the transceivers and the network interface.