Patents by Inventor Michael DEFFERRARD

Michael DEFFERRARD has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250355632
    Abstract: A method includes generating, via a virtual machine, a group of code traces, each code trace of the group of code traces corresponding to a respective algorithm, of a group of algorithms, and a corresponding input. The method also includes fine-tuning a generative model in accordance with the group of code traces. The method further includes receiving, at the fine-tuned generative model, computer programming code. The method also includes generating, via the fine-tuned generative mode, one or more computer programming code statements corresponding to the computer programming code or simulate an expected output of the computer programming code.
    Type: Application
    Filed: September 12, 2024
    Publication date: November 20, 2025
    Inventors: Wei David ZHANG, Corrado RAINONE, Michael DEFFERRARD, Roland MEMISEVIC, Mingu LEE, Zhan LING
  • Publication number: 20250252338
    Abstract: Certain aspects of the present disclosure provide techniques and apparatus for improved machine learning. In an example method, a current program state comprising a set of program instructions is accessed. A next program instruction is generated using a search operation, comprising generating a probability of the next program instruction based on processing the current program state and the next program instruction using a machine learning model, and generating a value of the next program instruction based on processing the current program state, the next program instruction, and a set of alternative outcomes using the machine learning model. An updated program state is generated based on adding the next program instruction to the set of program instructions.
    Type: Application
    Filed: February 1, 2024
    Publication date: August 7, 2025
    Inventors: Taco Sebastiaan COHEN, Corrado RAINONE, Blazej Jakub MANCZAK, Wei David ZHANG, Michael DEFFERRARD, Natasha BUTT
  • Publication number: 20240411968
    Abstract: Certain aspects of the present disclosure provide techniques and apparatus for evaluating electronic circuit designs. A directed graph representing a netlist design for an electrical circuit is accessed, the netlist design comprising a plurality of electronic components and a plurality of connections among the plurality of electronic components. A node in the directed graph is selected, the node corresponding to a register that receives input from one or more of the plurality of electronic components in the netlist design. A subgraph is generated for the node, based on the directed graph, comprising identifying a connectivity cone ending at the first register. A functional embedding is generated for the subgraph based on a trained encoder machine learning model. A predicted performance characteristic of the netlist design is generated based at least in part on the functional embedding.
    Type: Application
    Filed: June 9, 2023
    Publication date: December 12, 2024
    Inventors: Gokce SARAR, Ryan Michael CAREY, Arnav BALLANI, Bernard BOURON, Chandram KOTTURI, Chin-Wei HSU, Akshay Sanjay SARODE, Romain LEPERT, Michael DEFFERRARD, Onur ATAN, Lindsey Makana KOSTAS