Abstract: An apparatus is comprised of a processor, a fast-locking Phase-Locked Loop Waveform Generator (PLLWG), an amplifier circuit, and a voltage controlled oscillator (VCO). The processor generates data program signals to program the PLLWG and generates a trigger command signal instructing the PLLWG to generate an analog tuning signal. The PLLWG, coupled to the processor, generates the analog tuning signal based on the trigger command signal. The amplifier circuit, coupled to the PLLWG, receives the analog tuning signal, amplify the analog tuning signal, and generates a control voltage. The VCO, coupled to the amplifier circuit, receives the control voltage and amplifies the control voltage to generate an amplified Radio Frequency (RF) channel frequency signal.

Abstract: An apparatus is comprised of a processor, a fast-locking Phase-Locked Loop Waveform Generator (PLLWG), an amplifier circuit, and a voltage controlled oscillator (VCO). The processor generates data program signals to program the PLLWG and generates a trigger command signal instructing the PLLWG to generate an analog tuning signal. The PLLWG, coupled to the processor, generates the analog tuning signal based on the trigger command signal. The amplifier circuit, coupled to the PLLWG, receives the analog tuning signal, amplify the analog tuning signal, and generates a control voltage. The VCO, coupled to the amplifier circuit, receives the control voltage and amplifies the control voltage to generate an amplified Radio Frequency (RF) channel frequency signal.

Abstract: An apparatus is comprised of a processor, a fast-locking Phase-Locked Loop Waveform Generator (PLLWG), an amplifier circuit, and a voltage controlled oscillator (VCO). The processor generates data program signals to program the PLLWG and generates a trigger command signal instructing the PLLWG to generate an analog tuning signal. The PLLWG, coupled to the processor, generates the analog tuning signal based on the trigger command signal. The amplifier circuit, coupled to the PLLWG, receives the analog tuning signal, amplify the analog tuning signal, and generates a control voltage. The VCO, coupled to the amplifier circuit, receives the control voltage and amplifies the control voltage to generate an amplified Radio Frequency (RF) channel frequency signal.

Abstract: An apparatus includes a processor, a Phase-Locked Loop Waveform Generator (PLLWG), a Voltage Controlled Oscillator (VCO), a demodulator, signal conditioning circuitry, and an Analog-to-Digital Converter (ADC). The processor generates control command signals, receives a digital data input signal, and performs spectrum analysis on the digital data input signal. The PLLWG is coupled to the processor, receives the control command signals, and generates a charge pump output signal based on the control command signals. The VCO is coupled to the PLLWG, receives a tuning signal based on the charge pump output signal, and outputs a VCO output signal based on the tuning signal. The demodulator receives an incoming modulated signal and the VCO output signal, and outputs an analog output signal based on the incoming modulated signal and the VCO output signal. The ADC converts the analog output signal into the digital data input signal.

Abstract: An apparatus includes a processor, a Phase-Locked Loop Waveform Generator (PLLWG), a Voltage Controlled Oscillator (VCO), a demodulator, signal conditioning circuitry, and an Analog-to-Digital Converter (ADC). The processor generates control command signals, receives a digital data input signal, and performs spectrum analysis on the digital data input signal. The PLLWG is coupled to the processor, receives the control command signals, and generates a charge pump output signal based on the control command signals. The VCO is coupled to the PLLWG, receives a tuning signal based on the charge pump output signal, and outputs a VCO output signal based on the tuning signal. The demodulator receives an incoming modulated signal and the VCO output signal, and outputs an analog output signal based on the incoming modulated signal and the VCO output signal. The ADC converts the analog output signal into the digital data input signal.

Abstract: An apparatus includes a processor, a Phase-Locked Loop Waveform Generator (PLLWG), a Voltage Controlled Oscillator (VCO), a demodulator, signal conditioning circuitry, and an Analog-to-Digital Converter (ADC). The processor generates control command signals, receives a digital data input signal, and performs spectrum analysis on the digital data input signal. The PLLWG is coupled to the processor, receives the control command signals, and generates a charge pump output signal based on the control command signals. The VCO is coupled to the PLLWG, receives a tuning signal based on the charge pump output signal, and outputs a VCO output signal based on the tuning signal. The demodulator receives an incoming modulated signal and the VCO output signal, and outputs an analog output signal based on the incoming modulated signal and the VCO output signal. The ADC converts the analog output signal into the digital data input signal.

Abstract: An apparatus includes a processor, a Phase-Locked Loop Waveform Generator (PLLWG), a Voltage Controlled Oscillator (VCO), a demodulator, signal conditioning circuitry, and an Analog-to-Digital Converter (ADC). The processor generates control command signals, receives a digital data input signal, and performs spectrum analysis on the digital data input signal. The PLLWG is coupled to the processor, receives the control command signals, and generates a charge pump output signal based on the control command signals. The VCO is coupled to the PLLWG, receives a tuning signal based on the charge pump output signal, and outputs a VCO output signal based on the tuning signal. The demodulator receives an incoming modulated signal and the VCO output signal, and outputs an analog output signal based on the incoming modulated signal and the VCO output signal. The ADC converts the analog output signal into the digital data input signal.

Abstract: An apparatus that is comprised of a controller, a digital-to-analog converter (DAC), a temperature sensor, an analog-to-digital converter (ADC), and a voltage controlled oscillator (VCO). The controller to reads temperature data proportional to a temperature of the VCO, reads previously-calculated calibration data based on the read temperature data, determines a frequency command signal based on the read previously-calculated calibration data, and outputs the frequency command signal. The DAC converts the frequency command signal into a frequency analog signal. The temperature sensor produces the temperature signal. The ADC converts the temperature signal into the temperature data. The VCO produces an output frequency based on the frequency analog signal.

Abstract: An apparatus is comprised of a processor, first and second first Phase-Locked Loop Waveform Generators (PLLWGs), first and second Voltage Controlled Oscillators (VCOs), and a Radio Frequency (RF) switch. The processor generates first and second data program signals to program the first PLLWG and the second PLLWG, respectively, and generates a first and second trigger command signals instructing the first and second PLLWGs to generate first and second analog tuning signals, respectively. The first PLLWG, coupled to the processor, generates the first analog tuning signal. The second PLLWG, coupled to the processor, generates the second analog tuning signal. The first VCO, coupled to the first PLLWG, generates a first channel frequency signal. The second VCO, coupled to the second PLLWG, generates a second channel frequency signal. The RF switch selectively outputs one of a first pre-switch frequency signal and a second pre-switch frequency signal.

Abstract: An apparatus that is comprised of a controller, a digital-to-analog converter (DAC), a temperature sensor, an analog-to-digital converter (ADC), and a voltage controlled oscillator (VCO). The controller to reads temperature data proportional to a temperature of the VCO, reads previously-calculated calibration data based on the read temperature data, determines a frequency command signal based on the read previously-calculated calibration data, and outputs the frequency command signal. The DAC converts the frequency command signal into a frequency analog signal. The temperature sensor produces the temperature signal. The ADC converts the temperature signal into the temperature data. The VCO produces an output frequency based on the frequency analog signal.

Abstract: An apparatus that is comprised of a controller, a digital-to-analog converter (DAC), a temperature sensor, an analog-to-digital converter (ADC), and a voltage controlled oscillator (VCO). The controller to reads temperature data proportional to a temperature of the VCO, reads previously-calculated calibration data based on the read temperature data, determines a frequency command signal based on the read previously-calculated calibration data, and outputs the frequency command signal. The DAC converts the frequency command signal into a frequency analog signal. The temperature sensor produces the temperature signal. The ADC converts the temperature signal into the temperature data. The VCO produces an output frequency based on the frequency analog signal.

Abstract: An apparatus that is comprised of a controller, a digital-to-analog converter (DAC), a temperature sensor, an analog-to-digital converter (ADC), and a voltage controlled oscillator (VCO). The controller to reads temperature data proportional to a temperature of the VCO, reads previously-calculated calibration data based on the read temperature data, determines a frequency command signal based on the read previously-calculated calibration data, and outputs the frequency command signal. The DAC converts the frequency command signal into a frequency analog signal. The temperature sensor produces the temperature signal. The ADC converts the temperature signal into the temperature data. The VCO produces an output frequency based on the frequency analog signal.

Abstract: An apparatus is comprised of a processor, a tuning voltage generator, a tuning circuit, an amplifier, and a voltage-controlled oscillator (VCO). The processor generates a tuning voltage command and a modulation command signal. The tuning voltage generator, coupled to the processor, receives the tuning voltage command and generates a baseline analog tuning signal based on the received tuning voltage command. The amplifier, coupled to the tuning voltage generator, receives the baseline analog tuning signal and the modulation signal, and generates a tuning signal based on the received baseline analog tuning signal and the received modulation command signal. The VCO, coupled to the amplifier, receives the tuning signal, generates a modulated radio frequency output signal based on the received tuning signal, and outputs the modulated radio frequency output signal, the modulated radio frequency output signal emulating a communication waveform.