Patents by Inventor Michael Dibattista
Michael Dibattista has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8451009Abstract: A light-emitting circuit includes a light-emitting transistor and a voltage supply in communication with the light-emitting transistor to bias the light-emitting transistor in a reasonably bright state. A reasonably bright state is a state in which light emission approaches the greatest for a given drain-source current in the light-emitting transistor. In one aspect, the light-emitting circuit is in communication with a device under test and configured so that the light-emitting transistor emits photons in a manner indicative of an operation of the device under test. The light-emitting circuit may be disposed in a first semiconductor layer, and the device under test may be disposed in a second semiconductor layer. Further, the first semiconductor layer may be included in a first die, and the second semiconductor layer may be included in a second die.Type: GrantFiled: October 21, 2010Date of Patent: May 28, 2013Assignee: QUALCOMM IncorporatedInventors: Martin L. Villafana, Michael DiBattista, Gary Woods
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Patent number: 8278220Abstract: A microscopic metallic structure is produced by creating or exposing a patterned region of increased conductivity and then forming a conductor on the region using electrodeposition. In some embodiments, a microscopic metallic structure is formed on a substrate, and then the substrate is etched to remove the structure from the substrate. In some embodiments, a focused beam of gallium ion without a deposition precursor gas scans a pattern on a silicon substrate, to produce a conductive pattern on which a copper structure is then formed by electrochemical deposition of one or more metals. The structure can be freed from the substrate by etching, or can used in place. A beam can be used to access an active layer of a transistor, and then a conductor can be electrodeposited to provide a lead for sensing or modifying the transistor operation while it is functioning.Type: GrantFiled: September 15, 2008Date of Patent: October 2, 2012Assignee: FEI CompanyInventors: Theresa Holtermann, Anthony Graupera, Michael Dibattista
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Publication number: 20110101991Abstract: A light-emitting circuit includes a light-emitting transistor and a voltage supply in communication with the light-emitting transistor to bias the light-emitting transistor in a reasonably bright state. A reasonably bright state is a state in which light emission approaches the greatest for a given drain-source current in the light-emitting transistor. In one aspect, the light-emitting circuit is in communication with a device under test and configured so that the light-emitting transistor emits photons in a manner indicative of an operation of the device under test. The light-emitting circuit may be disposed in a first semiconductor layer, and the device under test may be disposed in a second semiconductor layer. Further, the first semiconductor layer may be included in a first die, and the second semiconductor layer may be included in a second die.Type: ApplicationFiled: October 21, 2010Publication date: May 5, 2011Applicant: QUALCOMM IncorporatedInventors: Martin L. Villafana, Michael DiBattista, Gary Woods
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Publication number: 20100032302Abstract: A microscopic metallic structure is produced by creating or exposing a patterned region of increased conductivity and then forming a conductor on the region using electrodeposition. In some embodiments, a microscopic metallic structure is formed on a substrate, and then the substrate is etched to remove the structure from the substrate. In some embodiments, a focused beam of gallium ion without a deposition precursor gas scans a pattern on a silicon substrate, to produce a conductive pattern on which a copper structure is then formed by electrochemical deposition of one or more metals. The structure can be freed from the substrate by etching, or can used in place. A beam can be used to access an active layer of a transistor, and then a conductor can be electrodeposited to provide a lead for sensing or modifying the transistor operation while it is functioning.Type: ApplicationFiled: September 15, 2008Publication date: February 11, 2010Applicant: FEI COMPANYInventors: THERESA HOLTERMANN, Anthony Graupera, Michael DiBattista
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Patent number: 7232526Abstract: A method and apparatus for controlling the removal of material from a semiconductor substrate in an integrated circuit fabrication process is disclosed. The method and apparatus utilize a light source or charged particle beam (electron or ion beam) to induce a current in at least one P-N junction formed in the semiconductor substrate. The induced current is monitored during the removal of material and the process is stopped or endpointed in response to the induced current making a predetermined transition.Type: GrantFiled: June 15, 2004Date of Patent: June 19, 2007Assignee: Intel CorporationInventors: Richard H. Livengood, Paul Winer, Gary Woods, Michael DiBattista
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Patent number: 7183122Abstract: Nano-machining for circuit edits through the front side or backside of an integrated circuit may be performed using a scanning probe system. The system may create access holes with smaller dimensions and facilitate nano-machining endpoint detection in some embodiments.Type: GrantFiled: May 19, 2004Date of Patent: February 27, 2007Assignee: Intel CorporationInventors: Michael DiBattista, Richard H. Livengood, Elizabeth B. Varner, Randall C. White
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Patent number: 6975184Abstract: A material may be removed from the top electrode of a film bulk acoustic resonator to alter the mass loading effect and to adjust the frequency of one film bulk acoustic resonator on a wafer relative to other resonators on the same wafer. Similarly, the piezoelectric layer or the bottom electrode may be selectively milled with a focused ion beam to trim the resonator.Type: GrantFiled: May 30, 2003Date of Patent: December 13, 2005Assignee: Intel CorporationInventors: Li-Peng Wang, Michael Dibattista, Seth Fortuna, Qing Ma, Valluri Rao
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Publication number: 20050260775Abstract: Nano-machining for circuit edits through the front side or backside of an integrated circuit may be performed using a scanning probe system. The system may create access holes with smaller dimensions and facilitate nano-machining endpoint detection in some embodiments.Type: ApplicationFiled: May 19, 2004Publication date: November 24, 2005Inventors: Michael DiBattista, Richard Livengood, Elizabeth Varner, Randall White
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Publication number: 20040241999Abstract: A method and apparatus for controlling the removal of material from a semiconductor substrate in an integrated circuit fabrication process is disclosed. The method and apparatus utilize a light source or charged particle beam (electron or ion beam) to induce a current in at least one P-N junction formed in the semiconductor substrate. The induced current is monitored during the removal of material and the process is stopped or endpointed in response to the induced current making a predetermined transition.Type: ApplicationFiled: June 15, 2004Publication date: December 2, 2004Applicant: Intel CorporationInventors: Richard H. Livengood, Paul Winer, Gary Woods, Michael DiBattista
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Publication number: 20040239450Abstract: A material may be removed from the top electrode of a film bulk acoustic resonator to alter the mass loading effect and to adjust the frequency of one film bulk acoustic resonator on a wafer relative to other resonators on the same wafer. Similarly, the piezoelectric layer or the bottom electrode may be selectively milled with a focused ion beam to trim the resonator.Type: ApplicationFiled: May 30, 2003Publication date: December 2, 2004Inventors: Li-Peng Wang, Michael Dibattista, Seth Fortuna, Qing Ma, Valluri Rao
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Patent number: 6825557Abstract: An integrated circuit device is disclosed. The device comprises a die that has functional units on a first surface and a cooling system arranged adjacent a second surface opposite the first surface. The cooling system comprises a least one microchannel to contain a cooling liquid and to allow flow of the cooling liquid and at least one reservoir arranged adjacent to a region of the die. There is at least one valve between the reservoir and the microchannel to allow the cooling liquid to flow into the reservoir wherein flow of the cooling liquid depends upon a temperature of the die region.Type: GrantFiled: December 17, 2002Date of Patent: November 30, 2004Assignee: Intel CorporationInventors: Michael DiBattista, Richard H. Livengood
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Patent number: 6780658Abstract: A method and apparatus for controlling the removal of material from a semiconductor substrate in an integrated circuit fabrication process is disclosed. The method and apparatus utilize a light source or charged particle beam (electron or ion beam) to induce a current in at least one P-N junction formed in the semiconductor substrate. The induced current is monitored during the removal of material and the process is stopped or endpointed in response to the induced current making a predetermined transition.Type: GrantFiled: June 5, 2003Date of Patent: August 24, 2004Assignee: Intel CorporationInventors: Richard H. Livengood, Paul Winer, Gary Woods, Michael DiBattista
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Publication number: 20040113265Abstract: An integrated circuit device is disclosed. The device comprises a die that has functional units on a first surface and a cooling system arranged adjacent a second surface opposite the first surface. The cooling system comprises a least one microchannel to contain a cooling liquid and to allow flow of the cooling liquid and at least one reservoir arranged adjacent to a region of the die. There is at least one valve between the reservoir and the microchannel to allow the cooling liquid to flow into the reservoir wherein flow of the cooling liquid depends upon a temperature of the die region.Type: ApplicationFiled: December 17, 2002Publication date: June 17, 2004Applicant: Intel CorporationInventors: Michael DiBattista, Richard H. Livengood
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Publication number: 20040017130Abstract: A material may be patterned and defined on the upper electrode of a film bulk acoustic resonator to provide a mass loading effect that adjusts the frequency of one film bulk acoustic resonator on a wafer relative to other resonators on the same wafer. The applied material that has a high degree of etch selectivity with respect to the material of the upper electrode of the film bulk acoustic resonator.Type: ApplicationFiled: July 24, 2002Publication date: January 29, 2004Inventors: Li-Peng Wang, Qing Ma, Quan A. Tran, Teresa Rini, Michael Dibattista
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Publication number: 20030207578Abstract: A method and apparatus for controlling the removal of material from a semiconductor substrate in an integrated circuit fabrication process is disclosed. The method and apparatus utilize a light source or charged particle beam (electron or ion beam) to induce a current in at least one P-N junction formed in the semiconductor substrate. The induced current is monitored during the removal of material and the process is stopped or endpointed in response to the induced current making a predetermined transition.Type: ApplicationFiled: June 5, 2003Publication date: November 6, 2003Applicant: Intel CorporationInventors: Richard H. Livengood, Paul Winer, Gary Woods, Michael DiBattista
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Patent number: 6579732Abstract: A method and apparatus for controlling the removal of material from a semiconductor substrate in an integrated circuit fabrication process is disclosed. The method and apparatus utilize a light source or charged particle beam (electron or ion beam) to induce a current in at least one P-N junction formed in the semiconductor substrate. The induced current is monitored during the removal of material and the process is stopped or endpointed in response to the induced current making a predetermined transition.Type: GrantFiled: December 20, 2001Date of Patent: June 17, 2003Assignee: Intel CorporationInventors: Richard H. Livengood, Paul Winer, Gary Woods, Michael DiBattista
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Publication number: 20020055272Abstract: A method and apparatus for controlling the removal of material from a semiconductor substrate in an integrated circuit fabrication process is disclosed. The method and apparatus utilize a light source or charged particle beam (electron or ion beam) to induce a current in at least one P-N junction formed in the semiconductor substrate. The induced current is monitored during the removal of material and the process is stopped or endpointed in response to the induced current making a predetermined transition.Type: ApplicationFiled: December 20, 2001Publication date: May 9, 2002Applicant: Intel Corporation.Inventors: Richard H. Livengood, Paul Winer, Gary Woods, Michael DiBattista
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Patent number: 6355494Abstract: A method and apparatus for controlling the removal of material from a semiconductor substrate in an integrated circuit fabrication process is disclosed. The method and apparatus utilize a light source or charged particle beam (electron or ion beam) to induce a current in at least one P-N junction formed in the semiconductor substrate. The induced current is monitored during the removal of material and the process is stopped or endpointed in response to the induced current making a predetermined transition.Type: GrantFiled: October 30, 2000Date of Patent: March 12, 2002Assignee: Intel CorporationInventors: Richard H. Livengood, Paul Winer, Gary Woods, Michael DiBattista
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Patent number: 5731587Abstract: A hot stage for a scanning probe microscope includes a substrate having a dielectric window region which is stress compensated to be held in mild tension at elevated temperatures. A heating element is supplied to heat a specimen deposited on the dielectric widow region and the scanning probe microscope is used to observe specimen characteristics at the elevated temperatures. The dielectric window region is configured to be thermally isolated from the rest of the hot stage allowing only a minimum amount of heat to be dissipated into the scanning probe microscope. Temperature sensing resistors are included for monitoring the temperature in the dielectric window region. Conductivity cell electrodes can also be included for sensing the conductivity and capacitance of the specimen. Furthermore, additional control and measurement hardware, such as a temperature sensor circuit, evaluation station, the ramp generator circuit, etc. can be included to provide additional system features.Type: GrantFiled: August 12, 1996Date of Patent: March 24, 1998Assignee: The Regents Of The University Of MichiganInventors: Michael DiBattista, Sanjay V. Patel, John L. Gland, Johannes W. Schwank