Patents by Inventor Michael Doggett
Michael Doggett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9430818Abstract: A rasterizer, based on time-dependent edge equations, computes analytical visibility in order to render accurate motion blur. An oracle-based compression algorithm for the time intervals lowers the frame buffer requirements. High quality motion blurred scenes can be rendered using a rasterizer with rather low memory requirements. The resulting images may contain motion blur for both opaque and transparent objects.Type: GrantFiled: June 8, 2015Date of Patent: August 30, 2016Assignee: Intel CorporationInventors: Carl Johan Gribel, Michael Doggett, Tomas G. Akenine-Moller
-
Publication number: 20150269713Abstract: A rasterizer, based on time-dependent edge equations, computes analytical visibility in order to render accurate motion blur. An oracle-based compression algorithm for the time intervals lowers the frame buffer requirements. High quality motion blurred scenes can be rendered using a rasterizer with rather low memory requirements. The resulting images may contain motion blur for both opaque and transparent objects.Type: ApplicationFiled: June 8, 2015Publication date: September 24, 2015Inventors: Carl Johan Gribel, Michael Doggett, Tomas G. Akenine-Moller
-
Patent number: 9111328Abstract: Embodiments relate to compression and decompression of textures. A texel block (10) is compressed by specifying two major directions in the texel block (10) and defining the profiles of how the texel values change along the respective directions. The resulting compressed texel block (30) comprises two value codewords (31, 32), two line codewords (35-38) and a function codeword (33, 34). The two value codewords (31, 32) are employed to calculate two texel values for the texel block (10). The line codewords (35-38) are employed to determine equations of two lines (20, 22) coinciding with the two major directions in the texel block (10). Signed distances are calculated for each texel (12) from the texel position in the texel block (10) and to the two lines (20, 22). The signed distances are input to a function defined by the function codeword (33, 34) to output two values from which weights are calculated and applied to the two texel values in order to get a representation of the texel value of a texel (12).Type: GrantFiled: February 9, 2011Date of Patent: August 18, 2015Assignee: Telefonaktiebolaget L M Ericsson (publ)Inventors: Jim Rasmusson, Michael Doggett, Jacob Ström, Per Wennersten
-
Patent number: 9082228Abstract: A rasterizer, based on time-dependent edge equations, computes analytical visibility in order to render accurate motion blur. An oracle-based compression algorithm for the time intervals lowers the frame buffer requirements. High quality motion blurred scenes can be rendered using a rasterizer with rather low memory requirements. The resulting images may contain motion blur for both opaque and transparent objects.Type: GrantFiled: January 12, 2011Date of Patent: July 14, 2015Assignee: Intel CorporationInventors: Carl Johan Gribel, Michael Doggett, Tomas G. Akenine-Möller
-
Publication number: 20130033513Abstract: Embodiments relate to compression and decompression of textures. A texel block (10) is compressed by specifying two major directions in the texel block (10) and defining the profiles of how the texel values change along the respective directions. The resulting compressed texel block (30) comprises two value codewords (31, 32), two line codewords (35-38) and a function codeword (33, 34). The two value codewords (31, 32) are employed to calculate two texel values for the texel block (10). The line codewords (35-38) are employed to determine equations of two lines (20, 22) coinciding with the two major directions in the texel block (10). Signed distances are calculated for each texel (12) from the texel position in the texel block (10) and to the two lines (20, 22). The signed distances are input to a function defined by the function codeword (33, 34) to output two values from which weights are calculated and applied to the two texel values in order to get a representation of the texel value of a texel (12).Type: ApplicationFiled: February 9, 2011Publication date: February 7, 2013Applicant: TELEFONAKTIEBOLAGET L M ERICSSON (publ)Inventors: Jim Rasmusson, Michael Doggett, Jacob Ström, Per Wennersten
-
Patent number: 8330767Abstract: A method and apparatus for angular invariant texture level of detail calculation is disclosed. The method includes a determination for a LOD that determines angular invariant LODs that result in efficient ASIC hardware implementation.Type: GrantFiled: March 24, 2009Date of Patent: December 11, 2012Assignee: Advanced Micro Devices, Inc.Inventors: Konstantine Iourcha, Michael Doggett
-
Publication number: 20120177287Abstract: A rasterizer, based on time-dependent edge equations, computes analytical visibility in order to render accurate motion blur. An oracle-based compression algorithm for the time intervals lowers the frame buffer requirements. High quality motion blurred scenes can be rendered using a rasterizer with rather low memory requirements. The resulting images may contain motion blur for both opaque and transparent objects.Type: ApplicationFiled: January 12, 2011Publication date: July 12, 2012Inventors: Carl Johan Gribel, Michael Doggett, Tomas G. Akenine-Möller
-
Patent number: 7924281Abstract: A graphics processing circuit includes a pixel shader operative to provide pixel color information in response to image data representing a scene to be rendered; a texture circuit, coupled to the pixel shader, operative to determine a luminance value to be applied to a pixel of interest based on the luminance values of the pixels that define a plane including the pixel of interest; and a render back end circuit, coupled to the texture circuit, operative to compute the luminance values from a shadow map that specifies the distance from the light source of the nearest object at a plurality of locations.Type: GrantFiled: March 9, 2005Date of Patent: April 12, 2011Assignee: ATI Technologies ULCInventors: Stephen L. Morein, Larry D. Seiler, Michael Doggett, Jocelyn Houle
-
Publication number: 20100245374Abstract: A method and apparatus for angular invariant texture level of detail calculation is disclosed. The method includes a determination for a LOD that determines angular invariant LODs that result in efficient ASIC hardware implementation.Type: ApplicationFiled: March 24, 2009Publication date: September 30, 2010Applicant: ADVANCED MICRO DEVICES, INC.Inventors: Konstantine Iourcha, Michael Doggett
-
Patent number: 7336284Abstract: A memory architecture for use in a graphics processor including a main memory, a level one (L1) cache and a level two (L2) cache, coupled between the main memory and the L1 cache is disclosed. The L2 cache stores overlapping requests to the main memory before the requested information is stored in the L1 cache. In this manner, overlapping requests for previously stored information is retrieved from the faster L2 cache as opposed to the relatively slower main memory.Type: GrantFiled: April 8, 2004Date of Patent: February 26, 2008Assignee: ATI Technologies Inc.Inventors: Stephen L. Morein, Michael Doggett
-
Publication number: 20060202941Abstract: A graphics processing circuit includes a pixel shader operative to provide pixel color information in response to image data representing a scene to be rendered; a texture circuit, coupled to the pixel shader, operative to determine a luminance value to be applied to a pixel of interest based on the luminance values of the pixels that define a plane including the pixel of interest; and a render back end circuit, coupled to the texture circuit, operative to compute the luminance values from a shadow map that specifies the distance from the light source of the nearest object at a plurality of locations.Type: ApplicationFiled: March 9, 2005Publication date: September 14, 2006Applicant: ATI TECHNOLOGIES INC.Inventors: Stephen Morein, Larry Seiler, Michael Doggett, Jocelyn Houle
-
Publication number: 20050225558Abstract: A memory architecture for use in a graphics processor including a main memory, a level one (L1) cache and a level two (L2) cache, coupled between the main memory and the L1 cache is disclosed. The L2 cache stores overlapping requests to the main memory before the requested information is stored in the L1 cache. In this manner, overlapping requests for previously stored information is retrieved from the faster L2 cache as opposed to the relatively slower main memory.Type: ApplicationFiled: April 8, 2004Publication date: October 13, 2005Applicant: ATI Technologies, Inc.Inventors: Stephen Morein, Michael Doggett