Patents by Inventor Michael Douglas Seeman

Michael Douglas Seeman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11356087
    Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: June 7, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael Douglas Seeman, Sandeep R. Bahl, David I. Anderson
  • Publication number: 20210167767
    Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.
    Type: Application
    Filed: February 11, 2021
    Publication date: June 3, 2021
    Inventors: Michael Douglas Seeman, Sandeep R. Bahl, David I. Anderson
  • Patent number: 10177685
    Abstract: Disclosed examples include switching power converters, control methods and ripple filter circuits in which first and second switches are connected in series across first and second DC bus nodes, with an inductor connected to a switching node joining the first and second switches and a storage capacitor between the inductor and the second DC bus node. A control circuit operates the switches to alternately transfer ripple energy from a DC bus capacitor of the DC bus circuit through the inductor to the storage capacitor, and then to transfer ripple energy from the storage capacitor through the inductor to the DC bus capacitor to regulate the ripple voltage of the DC bus circuit, and the control circuit provides hysteretic control of the absolute value of the inductor current between a first value and a higher second value during transfer of ripple energy between the DC bus capacitor and the storage capacitor.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: January 8, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Bin Gu, Michael Douglas Seeman
  • Publication number: 20180006640
    Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.
    Type: Application
    Filed: September 12, 2017
    Publication date: January 4, 2018
    Inventors: Michael Douglas Seeman, Sandeep R. Bahl, David I. Anderson
  • Patent number: 9762230
    Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: September 12, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael Douglas Seeman, Sandeep R. Bahl, David I. Anderson
  • Publication number: 20170077837
    Abstract: Disclosed examples include switching power converters, control methods and ripple filter circuits in which first and second switches are connected in series across first and second DC bus nodes, with an inductor connected to a switching node joining the first and second switches and a storage capacitor between the inductor and the second DC bus node. A control circuit operates the switches to alternately transfer ripple energy from a DC bus capacitor of the DC bus circuit through the inductor to the storage capacitor, and then to transfer ripple energy from the storage capacitor through the inductor to the DC bus capacitor to regulate the ripple voltage of the DC bus circuit, and the control circuit provides hysteretic control of the absolute value of the inductor current between a first value and a higher second value during transfer of ripple energy between the DC bus capacitor and the storage capacitor.
    Type: Application
    Filed: September 7, 2016
    Publication date: March 16, 2017
    Applicant: Texas Instruments Incorporated
    Inventors: Bin Gu, Michael Douglas Seeman
  • Publication number: 20150137619
    Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.
    Type: Application
    Filed: November 17, 2014
    Publication date: May 21, 2015
    Inventors: Michael Douglas Seeman, Sandeep R. Bahl, David I. Anderson