Abstract: A method for printing on labels applied to cards in a printing system includes at least one inkjet printer, the method also includes supplying to the printing system a card provided with a first surface and a label provided with a first face opposite a second face, engaging the second face of the label on the first surface of the card, so as to apply the label to the card, printing by the at least one inkjet printer the first face of the label applied to the card, removing from the printing system the card bearing the printed label. A printing system is also provided for printing on labels applied to cards, which works with the method.

Abstract: A cleaning assembly for a DOD print head including a main body, a suction hole provided near an outer surface of the main body, the outer surface facing a nozzle plate and the suction hole facing the plurality of nozzles, and a moving mechanism, the outer surface including a contact cleaning element surrounding an outer perimeter the suction hole, an area of a region surface delimited by the contact cleaning element being smaller than an area of the outer surface, the moving mechanism bringing the contact cleaning element in contact with the nozzle plate and moving the main body relative to the print head body along the second direction.

Abstract: The disclosure relates to an audio processing device. This device comprises an audio processing component, e.g. DSP, a microprocessor, memory and a communication interface. Said microprocessor receives via said communication interface two or more listening profiles from personal devices of two or more persons. Said microprocessor comprises means for calculating a combined listening profile out of the two or more received listening profiles and means for calculating a compensation gain profile out of the combined listening profile. Said audio processing component makes use of the compensation gain profile to adapt the audio processing to the listening deficits of the two or more persons who are jointly consuming the audio presentation from the audio processing device.

Abstract: A smartphone having two microphones is used for determining the direction of a loudspeaker in a surround system setup. This is performed using smartphone rotation in azimuth and polar angle direction while capturing in its microphones a test signal from a current one of the loudspeakers. From the microphone signals a corresponding TDOA value is calculated, and the smartphone is rotated until that TDOA value is nearly zero, resulting in a loudspeaker direction information.

Abstract: The disclosure relates to the field of electrical connectors, in particular phone connectors. The proposal concerns a socket for an electrical plug which comprises two or more electrical contacts being positioned along a longitudinal axis. The socket includes two or more corresponding contact elements. The socket is constructed in such a way that the corresponding contact elements are mounted at the socket along a curved line such that the electrical plug when inserted into the socket will be bent in the form of the curved line. The proposal further concerns a flexible electrical plug having two or more electrical contact elements positioned along a longitudinal axis wherein the contact elements are constructed in a flexible material.

Abstract: A smartphone having two microphones is used for determining the direction of a loudspeaker in a surround system setup. This is performed using smartphone rotation in azimuth and polar angle direction while capturing in its microphones a test signal from a current one of the loudspeakers. From the microphone signals a corresponding TDOA value is calculated, and the smartphone is rotated until that TDOA value is nearly zero, resulting in a loudspeaker direction information.

Abstract: The invention concerns a solid state memory, comprising multiple logical units. The solid state memory contains an internal buffer for temporarily storing the incoming data steam before the incoming data are programmed to at least one page. The internal buffer keeps data that are not yet programmed in case a switch from one logical unit to another is performed. A method for operating such a device is presented.

Abstract: High speed mass storage devices using NAND flash memories (MDY.X) are suitable for recording and playing back a video data stream under real-time conditions, wherein the data are handled page-wise in the flash memories and are written in parallel to multiple memory buses (MBy). However, for operating with multiple independent data streams a significant buffer size is required. According to the invention, data from different data streams are collected in corresponding different buffers (FIFO 1, . . . , FIFO Z) until the amount of collected data in a current buffer corresponds to a current one of the data blocks. Then, the data of the current data block from the current buffer are stored into memories connected to a current one of the memory buses, wherein the following buffered data block of the related data stream is later on stored into memories connected to a following one of the memory buses, the number of the following memory bus being increased with respect to the number of the current memory bus.

Abstract: The invention is related to a method and a device for recording of frames. Said method comprises buffering fractions of frames in a buffer and transferring from the buffer to memory devices data packets comprising at least one fraction, each, wherein after transferring to a first memory device a first fraction of a first frame, only fractions of said first frame are transferred to said first memory device until the amount of data belonging to said first frame and being transferred to said first memory device corresponds the storage capacity of at least one memory block comprised in said first memory device.

Abstract: For writing, flash memory devices are physically accessed in a page-oriented mode, but such devices are not error-free in operation. According to the invention, when writing information data in a bus write cycle in a sequential manner into flash memory devices assigned to a common data bus, at least one of said flash memory devices is not fed for storage with a current section of said information data. In case an error is occurring while writing a current information data section into a page of a current one of said flash memory devices, said current information data section is written into a non-flash memory. During the following bus write cycle, while the flash memory device containing that defective page is normally idle, that idle time period is used for copying the corresponding stored section of said information data from said non-flash memory to a non-defect page of that flash memory device.

Abstract: High speed mass storage devices using NAND flash memories (MDY.X) are suitable for recording and playing back a video data stream under real-time conditions, wherein the data are handled page-wise in the flash memories and are written in parallel to multiple memory buses (MBy). However, for operating with multiple independent data streams a significant buffer size is required. According to the invention, data from different data streams are collected in corresponding different buffers (FIFO 1, . . . , FIFO Z) until the amount of collected data in a current buffer corresponds to a current one of the data blocks. Then, the data of the current data block from the current buffer are stored into memories connected to a current one of the memory buses, wherein the following buffered data block of the related data stream is later on stored into memories connected to a following one of the memory buses, the number of the following memory bus being increased with respect to the number of the current memory bus.

Abstract: Device for real-time streaming to an array of solid state memory device sets, said device comprising receiving means for receiving data from data streams of individual data rate in parallel, an input cache for buffering received data, a bus system for transferring data from the input buffer to the solid state memory device sets, and a controller adapted for using a page-receiving-time t_r, a page-writing-time wrt_tm, the data amount p and the individual data rates for dynamically controlling the bus system such that data received from the first data stream is transferred to solid state memory device sets comprised in a first subset of said array of solid state memory device sets, only, and data received from the at least a second data stream is transferred to solid state memory device sets comprised in a different second subset of said array of solid state memory device sets, only.

Abstract: For writing, flash memory devices are physically accessed in a page-oriented mode, but such devices are not error-free in operation. According to the invention, when writing information data in a bus write cycle in a sequential manner into flash memory devices assigned to a common data bus, at least one of said flash memory devices is not fed for storage with a current section of said information data. In case an error is occurring while writing a current information data section into a page of a current one of said flash memory devices, said current information data section is written into a non-flash memory. During the following bus write cycle, while the flash memory device containing that defective page is normally idle, that idle time period is used for copying the corresponding stored section of said information data from said non-flash memory to a non-defect page of that flash memory device.

Abstract: The invention concerns a solid state memory, comprising multiple logical units. The solid state memory contains an internal buffer for temporarily storing the incoming data steam before the incoming data are programmed to at least one page. The internal buffer keeps data that are not yet programmed in case a switch from one logical unit to another is performed. A method for operating such a device is presented.

Abstract: Various applications record or handle uncompressed video, where the amount of information needed for each frame or field is constant, based on the video frame rate and color resolution of each pixel. Since various video frame rates and audio sample rates are defined and can be combined independently, the amount of audio samples per video frame may vary. The disclosed method allows packing audio samples and video samples into constant size containers, e.g. MXF containers, so that there is an integer amount of audio samples within the time period needed for one video frame, independent from the used video raster. The method includes generating constant length KLV encoded video packets, generating variable length KLV encoded audio packets corresponding to the same time period as the video packets, generating variable length KLV encoded data packets, wherein the sum of the lengths of the audio packet and the data packet are constant, and generating from said packets a constant size content package.

Abstract: For writing, flash memory devices are physically accessed in a page-oriented mode, but such devices are not error-free in operation. According to the invention, when writing information data in a bus write cycle in a sequential manner into flash memory devices assigned to a common data bus, at least one of said flash memory devices is not fed for storage with a current section of said information data. In case an error is occurring while writing a current information data section into a page of a current one of said flash memory devices, said current information data section is written into a non-flash memory. During the following bus write cycle, while the flash memory device containing that defective page is normally idle, that idle time period is used for copying the corresponding stored section of said information data from said non-flash memory to a non-defect page of that flash memory device.

Abstract: Device for real-time streaming to an array of solid state memory device sets, said device comprising receiving means for receiving data from data streams of individual data rate in parallel, an input cache for buffering received data, a bus system for transferring data from the input buffer to the solid state memory device sets, and a controller adapted for using a page-receiving-time t_r, a page-writing-time wrt_tm, the data amount p and the individual data rates for dynamically controlling the bus system such that data received from the first data stream is transferred to solid state memory device sets comprised in a first subset of said array of solid state memory device sets, only, and data received from the at least a second data stream is transferred to solid state memory device sets comprised in a different second subset of said array of solid state memory device sets, only.

Abstract: When recording uncompressed video and/or audio data using a digital video recorder, there is the need for a robust memory arrangement based on non-volatile, integrated circuits which is able to be fitted directly on the video camera without a long external cable connection and which is also able to be used for shots under difficult conditions, particularly action shots. The inventive memory arrangement involves the use of a number of non-volatile memory chips which are connected together with a favorable level of circuit complexity. To be able to cope with the high data rate for the incoming video and/or audio data, a plurality of parallel supply buses are provided. Each supply bus has an associated number of memory chips. In this case, the memory word length of the memory chips is greater than the bus width of a data/address bus.

Abstract: An electronic circuit includes a first and a second PLL stage (PLL1, PLL2) that can be switched in parallel or in series depending on locking of the first one of the PLL circuits to an input signal (IN). When in parallel, only the second PLL circuit (PLL2) is actively supplying a clock signal to the output of the electronic circuit. The first PLL circuit (PLL1) continues trying to lock onto the input signal (IN). A lock detector (LD) monitors the locking status of the first PLL circuit (PLL1) to the input signal (IN) and, upon locking, sets switches (S1, S2) to couple the output of the first PLL circuit (PLL1) to the input of the second PLL circuit (PLL2), and to couple the output of the second PLL circuit (PLL2) to the input of the first PLL circuit (PLL1).

Abstract: The invention is related to a method and a device for recording of frames. Said method comprises buffering fractions of frames in a buffer and transferring from the buffer to memory devices data packets comprising at least one fraction, each, wherein after transferring to a first memory device a first fraction of a first frame, only fractions of said first frame are transferred to said first memory device until the amount of data belonging to said first frame and being transferred to said first memory device corresponds the storage capacity of at least one memory block comprised in said first memory device.