Abstract: Metrology target design methods and verification targets are provided. Methods comprise using OCD data related to designed metrology target(s) as an estimation of a discrepancy between a target model and a corresponding actual target on a wafer, and adjusting a metrology target design model to compensate for the estimated discrepancy. The dedicated verification targets may comprise overlay target features and be size optimized to be measureable by an OCD sensor, to enable compensation for inaccuracies resulting from production process variation. Methods also comprise modifications to workflows between manufacturers and metrology vendors which provide enable higher fidelity metrology target design models and ultimately higher accuracy of metrology measurements.

Abstract: In an embodiment, a system includes at least one computing device and program instructions stored on a non-transitory computer readable medium. The program instructions, when executed by the at least one computing device, cause the at least one computing device to receive input data in the form of at least one search criterion indicative of a data landscape, query an electronic database based at least in part on the input data, retrieve a data list from the electronic database based at least in part on the query, count data with common player names from the data list, sort by count to generate a discrete distribution, apply power law analysis to the discrete distribution to determine the value of an exponent S of the discrete distribution and use the exponent S as a metric of consolidation of the data list. Said exponent may then be stored in a lossy compressed database.

Abstract: Methods are provided for designing metrology targets and estimating the uncertainty error of metrology metric values with respect to stochastic noise such as line properties (e.g., line edge roughness, LER). Minimal required dimensions of target elements may be derived from analysis of the line properties and uncertainty error of metrology measurements, by either CDSEM (critical dimension scanning electron microscopy) or optical systems, with corresponding targets. The importance of this analysis is emphasized in view of the finding that stochastic noise may have increased importance with when using more localized models such as CPE (correctables per exposure). The uncertainty error estimation may be used for target design, enhancement of overlay estimation and evaluation of measurement reliability in multiple contexts.

Abstract: Metrology target design methods and verification targets are provided. Methods comprise using OCD data related to designed metrology target(s) as an estimation of a discrepancy between a target model and a corresponding actual target on a wafer, and adjusting a metrology target design model to compensate for the estimated discrepancy. The dedicated verification targets may comprise overlay target features and be size optimized to be measureable by an OCD sensor, to enable compensation for inaccuracies resulting from production process variation. Methods also comprise modifications to workflows between manufacturers and metrology vendors which provide enable higher fidelity metrology target design models and ultimately higher accuracy of metrology measurements.

Abstract: Systems and method are provided for analyzing target, process and metrology configuration sensitivities to a wide range of parameters, according to external requirements or inner development and verification needs. Systems comprise the following elements. An input module is arranged to receive parameters relating to targets, target metrology conditions and production processes, to generate target data. A metrology simulation unit is arranged to simulate metrology measurements of targets from the target data and to generate multiple metrics that quantify the simulated target measurements. A sensitivity analysis module is arranged to derive functional dependencies of the metrics on the parameters and to define required uncertainties of the parameters with respect to the derived functional dependencies. Finally, a target optimization module is arranged to rank targets and target metrology conditions with respect to the simulated target measurements.

Abstract: Metrology target design methods and verification targets are provided. Methods include using OCD data related to designed metrology target(s) as an estimation of a discrepancy between a target model and a corresponding actual target on a wafer, and adjusting a metrology target design model to compensate for the estimated discrepancy. The dedicated verification targets may include overlay target features and be size optimized to be measurable by an OCD sensor, to enable compensation for inaccuracies resulting from production process variation. Methods also include modifications to workflows between manufacturers and metrology vendors which provide enabled higher fidelity metrology target design models and ultimately higher accuracy of metrology measurements.

Abstract: Metrology targets and target design methods are provided, in which target elements are defined by replacing elements from a periodic pattern having a pitch p, by assist elements having at least one geometric difference from the replaced elements, to form a composite periodic structure that maintains the pitch p as a single pitch. Constructing targets within the bounds of compatibility with advanced multiple patterning techniques improves the fidelity of the targets and fill factor modulation enables adjustment of the targets to produce sufficient metrology sensitivity for extracting the overlay while achieving process compatibility of the targets.

Abstract: A process control system may include a controller configured to receive after-development inspection (ADI) data after a lithography step for the current layer from an ADI tool, receive after etch inspection (AEI) overlay data after an exposure step of the current layer from an AEI tool, train a non-zero offset predictor with ADI data and AEI overlay data to predict a non-zero offset from input ADI data, generate values of the control parameters of the lithography tool using ADI data and non-zero offsets generated by the non-zero offset predictor, and provide the values of the control parameters to the lithography tool for fabricating the current layer on the at least one production sample.

Abstract: Methods are provided for designing metrology targets and estimating the uncertainty error of metrology metric values with respect to stochastic noise such as line properties (e.g., line edge roughness, LER). Minimal required dimensions of target elements may be derived from analysis of the line properties and uncertainty error of metrology measurements, by either CDSEM (critical dimension scanning electron microscopy) or optical systems, with corresponding targets. The importance of this analysis is emphasized in view of the finding that stochastic noise may have increased importance with when using more localized models such as CPE (correctables per exposure). The uncertainty error estimation may be used for target design, enhancement of overlay estimation and evaluation of measurement reliability in multiple contexts.

Abstract: Method, metrology modules and RCA tool are provided, which use the behavior of resonance region(s) in measurement landscapes to evaluate and characterize process variation with respect to symmetric and asymmetric factors, and provide root cause analysis of the process variation with respect to process steps. Simulations of modeled stacks with different layer thicknesses and process variation factors may be used to enhance the analysis and provide improved target designs, improved algorithms and correctables for metrology measurements. Specific targets that exhibit sensitive resonance regions may be utilize to enhance the evaluation of process variation.

Abstract: A process control system may include a controller configured to receive after-development inspection (ADI) data after a lithography step for the current layer from an ADI tool, receive after etch inspection (AEI) overlay data after an exposure step of the current layer from an AEI tool, train a non-zero offset predictor with ADI data and AEI overlay data to predict a non-zero offset from input ADI data, generate values of the control parameters of the lithography tool using ADI data and non-zero offsets generated by the non-zero offset predictor, and provide the values of the control parameters to the lithography tool for fabricating the current layer on the at least one production sample.

Abstract: Methods and metrology tool modules embodying the methods are provided. Methods comprise measuring characteristics of intermediate features such as guiding lines in a directed self-assembly (DSA) process, deriving exposure parameters from the measured characteristics; and adjusting production parameters for producing consecutive target features according to the derived exposure parameters. The methods and modules enhance the accuracy of the DSA-produced structures and related measurements.

Abstract: Metrology targets and target design methods are provided, in which target elements are defined by replacing elements from a periodic pattern having a pitch p, by assist elements having at least one geometric difference from the replaced elements, to form a composite periodic structure that maintains the pitch p as a single pitch. Constructing targets within the bounds of compatibility with advanced multiple patterning techniques improves the fidelity of the targets and fill factor modulation enables adjustment of the targets to produce sufficient metrology sensitivity for extracting the overlay while achieving process compatibility of the targets.

Abstract: A metrology performance analysis system includes a metrology tool including one or more detectors and a controller communicatively coupled to the one or more detectors. The controller is configured to receive one or more metrology data sets associated with a metrology target from the metrology tool in which the one or more metrology data sets include one or more measured metrology metrics and the one or more measured metrology metrics indicate deviations from nominal values. The controller is further configured to determine relationships between the deviations from the nominal values and one or more selected semiconductor process variations, and determine one or more root causes of the deviations from the nominal values based on the relationships between values of the one or more metrology metrics and the one or more selected semiconductor process variations.

Abstract: Method, metrology modules and RCA tool are provided, which use the behavior of resonance region(s) in measurement landscapes to evaluate and characterize process variation with respect to symmetric and asymmetric factors, and provide root cause analysis of the process variation with respect to process steps. Simulations of modeled stacks with different layer thicknesses and process variation factors may be used to enhance the analysis and provide improved target designs, improved algorithms and correctables for metrology measurements. Specific targets that exhibit sensitive resonance regions may be utilize to enhance the evaluation of process variation.

Abstract: Methods and systems for performing semiconductor metrology directly on device structures are presented. A measurement model is created based on measured training data collected from at least one device structure. The trained measurement model is used to calculate process parameter values, structure parameter values, or both, directly from measurement data collected from device structures of other wafers. In some examples, measurement data from multiple targets is collected for model building, training, and measurement. In some examples, the use of measurement data associated with multiple targets eliminates, or significantly reduces, the effect of under layers in the measurement result, and enables more accurate measurements. Measurement data collected for model building, training, and measurement may be derived from measurements performed by a combination of multiple, different measurement techniques.

Abstract: Metrology target design methods and verification targets are provided. Methods include using OCD data related to designed metrology target(s) as an estimation of a discrepancy between a target model and a corresponding actual target on a wafer, and adjusting a metrology target design model to compensate for the estimated discrepancy. The dedicated verification targets may include overlay target features and be size optimized to be measureable by an OCD sensor, to enable compensation for inaccuracies resulting from production process variation. Methods also include modifications to workflows between manufacturers and metrology vendors which provide enable higher fidelity metrology target design models and ultimately higher accuracy of metrology measurements.

Abstract: Metrology methods, modules and targets are provided, for measuring tilted device designs. The methods analyze and optimize target design with respect to the relation of the Zernike sensitivity of pattern placement errors (PPEs) between target candidates and device designs. Monte Carlo methods may be applied to enhance the robustness of the selected target candidates to variation in lens aberration and/or in device designs. Moreover, considerations are provided for modifying target parameters judiciously with respect to the Zernike sensitivities to improve metrology measurement quality and reduce inaccuracies.

Abstract: A metrology performance analysis system includes a metrology tool including one or more detectors and a controller communicatively coupled to the one or more detectors. The controller is configured to receive one or more metrology data sets associated with a metrology target from the metrology tool in which the one or more metrology data sets include one or more measured metrology metrics and the one or more measured metrology metrics indicate deviations from nominal values. The controller is further configured to determine relationships between the deviations from the nominal values and one or more selected semiconductor process variations, and determine one or more root causes of the deviations from the nominal values based on the relationships between values of the one or more metrology metrics and the one or more selected semiconductor process variations.

Abstract: Systems and method are provided for analyzing target, process and metrology configuration sensitivities to a wide range of parameters, according to external requirements or inner development and verification needs. Systems comprise the following elements. An input module is arranged to receive parameters relating to targets, target metrology conditions and production processes, to generate target data. A metrology simulation unit is arranged to simulate metrology measurements of targets from the target data and to generate multiple metrics that quantify the simulated target measurements. A sensitivity analysis module is arranged to derive functional dependencies of the metrics on the parameters and to define required uncertainties of the parameters with respect to the derived functional dependencies. Finally, a target optimization module is arranged to rank targets and target metrology conditions with respect to the simulated target measurements.