Abstract: A segmented subsystem, for use within an automated test platform, includes a first subsystem segment including a first data sequencer configured to coordinate the execution of one or more instructions within the first subsystem segment. A second subsystem segment includes a second data sequencer configured to coordinate the execution of one or more instructions within the second subsystem segment.

Abstract: A segmented subsystem, for use within an automated test platform, includes a first subsystem segment configured to execute one or more instructions within the first subsystem segment. A second subsystem segment is configured to execute one or more instructions within the second subsystem segment. The first subsystem segment includes: a first functionality, a second functionality, and a status polling engine. The status polling engine is configured to: determine a first status for the first functionality and a second status for the second functionality, and generate a consolidated status indicator for the first subsystem segment based, at least in part, upon the first status for the first functionality and the second status for the second functionality.

Abstract: A segmented subsystem, for use within an automated test platform, includes a first subsystem segment including a first data sequencer configured to coordinate the execution of one or more instructions within the first subsystem segment. A second subsystem segment includes a second data sequencer configured to coordinate the execution of one or more instructions within the second subsystem segment.

Abstract: A segmented subsystem, for use within an automated test platform, includes a first subsystem segment configured to execute one or more instructions within the first subsystem segment. A second subsystem segment is configured to execute one or more instructions within the second subsystem segment. The first subsystem segment includes: a first functionality, a second functionality, and a status polling engine. The status polling engine is configured to: determine a first status for the first functionality and a second status for the second functionality, and generate a consolidated status indicator for the first subsystem segment based, at least in part, upon the first status for the first functionality and the second status for the second functionality.

Abstract: A converter device for converting signals between an RS-232 device and an RS-422 device. The converter device can either be self-powered, using signals at the I/O port of the RS-232 device to derive its operating voltages, or can be powered by an external voltage source when the I/O signals are not of sufficient magnitude to derive the operating voltages or there are a large number of devices connected in parallel by the converter device.

Abstract: A data transfer circuit for transferring data between a processor such as a personal computer and a peripheral. A command and data bus is connected between the processor and the data transfer circuit, and a peripheral bus is connected between the peripheral and the data transfer circuit. A counter is reset to zero and a random access memory is connected to the command and data bus when the data transfer cirucit is addressed. The counter increments by one responsive to each read or write command on the command and data bus such that the processor may read data from or write data to the random access memory without having to supply an address. A microcomputer based controller supplies addresses when data is read out of or written into the random access memory by the peripheral.