Patents by Inventor Michael E. Gaddis

Michael E. Gaddis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8817658
    Abstract: A method and system for managing the routing of traffic within a network develops a topological address space map of the network to enable a “best route” selection process. The network is comprised of a backbone connected to a plurality of peering partners. Points on the network monitor traffic flows. A central facility analyzes the traffic flows and routes within the network and performs intelligent routing management. Intelligent routing management ensures that traffic is properly routed through preferred routes on the network, and avoids inefficient routing. Intelligent routing management also selects new routes to be injected into the network in order to further improve the accuracy of the address space map of the network. Intelligent routing management ensures that bandwidth is requested and delivered topologically closely to peering partner networks, and that traffic is carried by the backbone for long haul data distribution in both directions.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: August 26, 2014
    Assignee: Level 3 Communications, LLC
    Inventors: Michael E. Gaddis, Peter N. Hicks, David Barmann, Steven T. Nunes
  • Publication number: 20090323544
    Abstract: A method and system for managing the routing of traffic within a network develops a topological address space map of the network to enable a “best route” selection process. The network is comprised of a backbone connected to a plurality of peering partners. Points on the network monitor traffic flows. A central facility analyzes the traffic flows and routes within the network and performs intelligent routing management. Intelligent routing management ensures that traffic is properly routed through preferred routes on the network, and avoids inefficient routing. Intelligent routing management also selects new routes to be injected into the network in order to further improve the accuracy of the address space map of the network. Intelligent routing management ensures that bandwidth is requested and delivered topologically closely to peering partner networks, and that traffic is carried by the backbone for long haul data distribution in both directions.
    Type: Application
    Filed: June 22, 2009
    Publication date: December 31, 2009
    Applicant: LEVEL 3 COMMUNICATIONS, LLC
    Inventors: Michael E. Gaddis, Peter N. Hicks, David Barmann, Steven T. Nunes
  • Patent number: 7554930
    Abstract: A method and system for managing the routing of traffic within a network develops a topological address space map of the network to enable a “best route” selection process. The network is comprised of a backbone connected to a plurality of peering partners. Points on the network monitor traffic flows. A central facility analyzes the traffic flows and routes within the network and performs intelligent routing management. Intelligent routing management ensures that traffic is properly routed through preferred routes on the network, and avoids inefficient routing. Intelligent routing management also selects new routes to be injected into the network in order to further improve the accuracy of the address space map of the network. Intelligent routing management ensures that bandwidth is requested and delivered topologically closely to peering partner networks, and that traffic is carried by the backbone for long haul data distribution in both directions.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: June 30, 2009
    Assignee: Level 3 Communications, LLC
    Inventors: Michael E. Gaddis, Peter N. Hicks, David Barmann, Steven T. Nunes
  • Patent number: 6965937
    Abstract: A method and system providing a single, symmetric path for forward and return traffic between two points on a network.
    Type: Grant
    Filed: May 4, 2001
    Date of Patent: November 15, 2005
    Assignee: WilTel Communications Group, LLC
    Inventors: Michael E. Gaddis, David Barmann, Peter N. Hicks, Michael A. Brown
  • Publication number: 20020069292
    Abstract: A method and system providing a single, symmetric path for forward and return traffic between two points on a network.
    Type: Application
    Filed: May 4, 2001
    Publication date: June 6, 2002
    Inventors: Michael E. Gaddis, David Barmann, Peter N. Hicks, Michael A. Brown
  • Patent number: 5996019
    Abstract: Methods and apparatus for scheduling cell transmission over a network link by a switch. The switch includes a plurality of queues associated with each link. Lists of queues are maintained for each link. In one embodiment, each link is associated with more than one type of list (with the list type corresponding to a scheduling category) and more than one prioritized list of each type (with the priority of the list corresponding to a quality of service). The scheduling lists are accessed to permit cell transmission from a queue contained therein in a predetermined sequence as a function of scheduling category, priority within a particular scheduling category and whether the bandwidth requirement for the particular scheduling category has been met. With this arrangement, maximum permissible delay requirements for each scheduling category are met.
    Type: Grant
    Filed: July 18, 1996
    Date of Patent: November 30, 1999
    Assignees: Fujitsu Network Communications, Inc., Fujitsu Limited
    Inventors: Stephen A. Hauser, Richard G. Bubenik, Stephen A. Caldara, Michael E. Gaddis, Thomas A. Manning, James M. Meredith, Raymond L. Strouble
  • Patent number: 5956337
    Abstract: An interface device for an ATM network permits a plurality of ATM devices to be connected to a single ATM switch port. The interface device, in its preferred embodiment, is a modular device which may be interconnected to form a system having various segment arrangements to suit the system operational requirements. Each interface device may include a switch side connector, extension side connector, and a device side connector all on a single card with the interface device being configured in VSLI architecture, and multiple interface devices interconnected to construct the system segments. In an alternate application, the interface device may be used to replace the computer backplane and provide direct connection between a computer's system components and an ATM network. In still another configuration, the interface device may itself be utilized to interconnect a plurality of computers to form a local area network.
    Type: Grant
    Filed: November 22, 1995
    Date of Patent: September 21, 1999
    Assignee: Washington University
    Inventor: Michael E. Gaddis
  • Patent number: 5905729
    Abstract: A system (10) is provided for mapping a data cell (32) in a communication switch. The system (10) includes a virtual translation table (40) having at least one virtual path translation table queue entry (92) and at least one virtual channel translation table queue entry (90). A to-switch port processor (12), which can access the virtual translation table (40), has at least one link (16-30) which receives the data cell (32). The to-switch port processor (12) maps the received data cell (32) to a queue descriptor using the virtual translation table (40).
    Type: Grant
    Filed: July 18, 1996
    Date of Patent: May 18, 1999
    Assignees: Fujitsu Network Communications, Inc., Fujitsu Limited
    Inventors: Michael E. Gaddis, Richard G. Bubenik, Stephen A. Caldara, Stephen A. Hauser, Thomas A. Manning
  • Patent number: 5815501
    Abstract: An ATM-Ethernet portal/concentrator permits a transparent interconnection between Ethernet segments over an ATM network to provide remote connectivity for Ethernet segments. The portal includes an Ethernet controller and an ATM cell processor, both of which receive and transmit data to and from a dual port shared memory under control of a direct memory access controller. A control microprocessor monitors and controls the shifting of data through the dual port memory. In this scheme, original data is written and read directly into and out of the dual port memory to thereby eliminate any requirement for copying of data, to thereby significantly increase the data throughput capability of the portal. In the concentrator embodiment, a plurality of Ethernet controllers, each of which is connected to its own associated Ethernet segment, is multiplexed through the concentrator to an ATM network to thereby provide remote connectivity for each of the Ethernet segments.
    Type: Grant
    Filed: April 9, 1997
    Date of Patent: September 29, 1998
    Assignees: Washington University, SBC Technology Resources, Inc.
    Inventors: Michael E. Gaddis, Richard G. Bubenik, Pierre Costa, Noritaka Matsuura
  • Patent number: 5457681
    Abstract: An ATM-Ethernet portal/concentrator permits a transparent interconnection between Ethernet segments over an ATM network to provide remote connectivity for Ethernet segments. The portal includes an Ethernet controller and an ATM cell processor, both of which receive and transmit data to and from a dual port shared memory under control of a direct memory access controller. A control microprocessor monitors and controls the shifting of data through the dual port memory. In this scheme, original data is written and read directly into and out of the dual port memory to thereby eliminate any requirement for copying of data, to thereby significantly increase the data throughput capability of the portal. In the concentrator embodiment, a plurality of Ethernet controllers, each of which is connected to its own associated Ethernet segment, is multiplexed through the concentrator to an ATM network to thereby provide remote connectivity for each of the Ethernet segments.
    Type: Grant
    Filed: June 5, 1992
    Date of Patent: October 10, 1995
    Assignees: Washington University, SBC Technology Resources, Inc.
    Inventors: Michael E. Gaddis, Richard G. Bubenik, Pierre Costa, Noritaka Matsuura