Abstract: An electronic system includes a digital-to-analog converter (DAC) circuit to provide a drive signal to a second circuit that provides a system output, and a control circuit connected to an input of the DAC circuit. The control circuit is configured to receive a target signal at an input of the control circuit, provide a control circuit output to the input of the DAC circuit according to the target signal, detect when a transition of the DAC circuit results in a glitch signal at an output of the DAC circuit, and provide a compensation signal to the DAC circuit to reduce a magnitude of the glitch signal.

Abstract: Various techniques are described to level shift an input signal from an input node to an output node of an open-loop voltage buffer circuit so that a DC offset voltage and a temperature-dependent voltage from the level shifter circuitry are mutually canceled out. By using these techniques, the output voltage of the buffer circuit tracks the input voltage with no DC offset voltage and no temperature drift.

Abstract: A circuit supply system includes a main digital to analog converter (DAC) circuit to produce a direct current (DC) output level at a system output; a feedback circuit path connected to the system output; a primary control circuit path connected to the feedback circuit path and configured to regulate the DC output level at the system output using the main DAC circuit and the feedback circuit path; and a secondary control circuit path connected to the feedback circuit path and configured to add a non-DC signal component to the DC output level and regulate the non-DC signal component using the feedback circuit path.

Abstract: Various techniques are described to level shift an input signal from an input node to an output node of an open-loop voltage buffer circuit so that a DC offset voltage and a temperature-dependent voltage from the level shifter circuitry are mutually canceled out. By using these techniques, the output voltage of the buffer circuit tracks the input voltage with no DC offset voltage and no temperature drift.

Abstract: A capacitive load, an inductive load, or a transmission line coupled to an output of a closed-loop amplifier circuit can cause undesirable oscillations in a feedback signal of the amplifier circuit. The oscillations in the feedback signal can cause the amplifier circuit to exhibit instability and unpredictable behavior. Techniques are described that allow an amplifier circuit to provide a stable response while driving a capacitive load.

Abstract: A clamp circuit comprises an output transistor and a replica transistor coupled as a current minor pair, wherein the replica transistor is scaled in size to the output transistor by a size ratio; a first current source configured to set a current in the replica transistor, wherein the output current is set at a clamped output current value that is a sum of current of the first current source and a scaled value of the current of the first current source determined according to the size ratio; and a register circuit, wherein a register value stored in the register circuit sets the clamped output current value.

Abstract: An electronic system includes a digital-to-analog converter (DAC) circuit to provide a drive signal to a second circuit that provides a system output, and a control circuit connected to an input of the DAC circuit. The control circuit is configured to receive a target signal at an input of the control circuit, provide a control circuit output to the input of the DAC circuit according to the target signal, detect when a transition of the DAC circuit results in a glitch signal at an output of the DAC circuit, and provide a compensation signal to the DAC circuit to reduce a magnitude of the glitch signal.

Abstract: An automated testing system comprises a high side switch circuit coupled to an input/output (I/O) connection, a low side switch circuit coupled to the I/O connection, a high side force amplifier (HFA) coupled to the high side switch, a low side force amplifier (LFA) coupled to the low side switch, an adjusting circuit coupled to the HFA and the LFA, and a control circuit configured to change the adjusting circuit to change control of current at the I/O connection from one of the HFA or LFA to the other of the HFA or LFA.

Abstract: A method of feedback control of an amplifier system includes driving multiple amplifier circuits using at least one digital-to-analog converter (DAC) circuit to set a system output of the amplifier system, operating the at least one DAC circuit using a first set of DAC codes to set the system output to a steady state target output, detecting a high glitch transition of the first set of DAC codes that is greater than a specified threshold transition, and changing to operating the at least one DAC circuit using a second set of DAC codes to set the system output to substantially the same steady state target output, wherein operating the at least one DAC circuit using the second set of DAC codes reduces glitch energy at the output of the at least one DAC circuit.

Abstract: A circuit supply system includes a main digital to analog converter (DAC) circuit to produce a direct current (DC) output level at a system output; a feedback circuit path connected to the system output; a primary control circuit path connected to the feedback circuit path and configured to regulate the DC output level at the system output using the main DAC circuit and the feedback circuit path; and a secondary control circuit path connected to the feedback circuit path and configured to add a non-DC signal component to the DC output level and regulate the non-DC signal component using the feedback circuit path.

Abstract: An amplifier circuit comprises a first gain circuit path configured to provide a first signal gain to an input signal, a second gain circuit path configured to provide a second signal gain to an input signal, an auxiliary gain circuit path configured to provide an auxiliary signal gain to an auxiliary input signal, wherein the auxiliary signal gain is equal to the first signal gain minus the second signal gain, a summing circuit configured to sum the second gain signal path and the auxiliary signal path, and logic circuitry configured to change an output of the circuit between the first gain circuit path and the sum of the second gain signal path and the auxiliary signal path, and set the auxiliary input signal equal to the input signal before the changing.

Abstract: A clamp circuit comprises an output transistor and a replica transistor coupled as a current minor pair, wherein the replica transistor is scaled in size to the output transistor by a size ratio; a first current source configured to set a current in the replica transistor, wherein the output current is set at a clamped output current value that is a sum of current of the first current source and a scaled value of the current of the first current source determined according to the size ratio; and a register circuit, wherein a register value stored in the register circuit sets the clamped output current value.

Abstract: An automated testing system comprises a high side switch circuit coupled to an input/output (I/O) connection, a low side switch circuit coupled to the I/O connection, a high side force amplifier (HFA) coupled to the high side switch, a low side force amplifier (LFA) coupled to the low side switch, an adjusting circuit coupled to the HFA and the LFA, and a control circuit configured to change the adjusting circuit to change control of current at the I/O connection from one of the HFA or LFA to the other of the HFA or LFA.

Abstract: An amplifier circuit comprises a first gain circuit path configured to provide a first signal gain to an input signal, a second gain circuit path configured to provide a second signal gain to an input signal, an auxiliary gain circuit path configured to provide an auxiliary signal gain to an auxiliary input signal, wherein the auxiliary signal gain is equal to the first signal gain minus the second signal gain, a summing circuit configured to sum the second gain signal path and the auxiliary signal path, and logic circuitry configured to change an output of the circuit between the first gain circuit path and the sum of the second gain signal path and the auxiliary signal path, and set the auxiliary input signal equal to the input signal before the changing.