Patents by Inventor Michael E. Orshansky

Michael E. Orshansky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7218980
    Abstract: A work-in-progress (WIP) tracking system is used to coordinate a semiconductor supply chain operation. The WIP tracking system receives WIP updates from semiconductor supply chain vendors and generates a WIP tracking report in which the volume of WIP is measured in expected good parts. In one variation, rather than reporting the WIP currently located at each step of a vendor's process, the WIP tracking report reflects the WIP located at various stages of the semiconductor manufacturing process, where the vendor's steps are mapped to a fewer number of stages.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: May 15, 2007
    Assignee: eSilicon Corporation
    Inventors: Michael E. Orshansky, Klaus ten Hagen
  • Patent number: 6748287
    Abstract: A work-in-progress (WIP) tracking system is used to coordinate a semiconductor supply chain. The WIP tracking receives WIP updates from semiconductor supply chain vendors and generates advanced notices based on an analysis of the WIP updates and predetermined rules. The advanced notices are delivered to downstream vendors to reduce semiconductor manufacturing cycle time and unpredictability between different semiconductor manufacturing phases.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: June 8, 2004
    Assignee: eSilicon Corporation
    Inventors: Klaus ten Hagen, Michael E. Orshansky
  • Publication number: 20020073388
    Abstract: The present invention is a device to measure the deterministic structure of the variation of the gate critical dimension (CD), so that accurate topological information about CD variation within the optical field is obtained. The present invention also involves determining the most frequent gate configurations (orientation and neighboring features) in a layout of a specific circuit design, and including these most frequent gate configurations in the measurement device. The present invention further includes a method to determine CD maps across the optical field, based on the collection of CD data for specific gate configurations. The CD maps are used in the course of computer-aided design of IC's to improve the accuracy in which circuit performance metrics and yield are estimated. The present invention describes a set of methods in which the CD maps are integrated into the computer-aided design of ICs.
    Type: Application
    Filed: December 11, 2000
    Publication date: June 13, 2002
    Inventors: Michael E. Orshansky, Linda Susan Milor