Abstract: An integrated circuit includes a high-speed interface configured to communicate with a host system for debugging and a debug hub coupled to the high-speed interface. The debug hub is configured to receive a debug command from the host system as memory mapped data. The integrated circuit also includes a plurality of debug cores coupled to the debug hub. Each debug core is coupled to the debug hub by channels. The debug hub is configured to translate the debug command to a data stream and provide the data stream to a target debug core of the plurality of debug cores based on an address specified by the debug command.

Abstract: An integrated circuit having an integrated logic analyzer can include a match circuit including at least one match cell, wherein each match cell is programmable at runtime to detect a signal state from a plurality of signal states for a probed signal. The integrated circuit can include a combine circuit configured to generate a first match signal indicating an occurrence of a first trigger condition based upon the detected signal state of each match cell, a capture and control circuit configured to determining addressing for storing trace data corresponding to the probed signal, and a trace storage memory configured to the store trace data at addresses determined by the capture and control circuit.

Abstract: In one embodiment, a method and apparatus for triggering and capturing digital circuit signals are disclosed. For example, a logic analyzer according to one embodiment includes at least one trigger combination block and a state machine deploy in a memory coupled to the trigger combination block, where the state machine includes an input coupled to an output of the trigger combination block and an output coupled to a capture memory in which one or more digital circuit signals are stored.

Abstract: Systems and methods utilizing virtual input/output (VIO) modules in PLDS. One or more VIO modules are embedded in a PLD along with the user circuit to be controlled and monitored. The VIO module includes a control module that acts as a virtual input module for the user circuit, and can optionally include a status module that acts as a virtual output module for the user circuit. A bi-directional data interface is provided between the user circuit and the VIO modules, and between the VIO modules and a communication module. The communication module is coupled through input/output pads of the PLD to an external communication link, and hence to a host computer in which resides software that controls the communication link. Thus, by interfacing with the host computer, a user can control the user circuit via the control modules and monitor output signals from the user circuit via the status modules.