Patents by Inventor Michael E. Watts
Michael E. Watts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9438184Abstract: An embodiment of an integrated passive device (IPD) assembly includes a first capacitor formed over a semiconductor substrate, where the first capacitor includes a first capacitor electrode, a second capacitor electrode, and dielectric material that electrically insulates the first capacitor electrode from the second capacitor electrode. The IPD assembly also includes a first contact pad exposed at a top surface of the IPD assembly and electrically coupled to the second capacitor electrode, and a second contact pad exposed at the top surface of the IPD. A second capacitor is coupled to the top surface of the IPD, and includes a first terminal electrically coupled to the first contact pad, and a second terminal electrically coupled to the second contact pad. The IPD assembly may be included in a packaged RF device, forming portions of an output impedance matching circuit and an envelope frequency termination circuit.Type: GrantFiled: June 27, 2014Date of Patent: September 6, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Jeffrey K. Jones, Basim H. Noori, Michael E. Watts
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Publication number: 20160240488Abstract: A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electrically conductive material is coupled to the cover in between components of the semiconductor device, with the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. In one version, the isolation structure includes a first leg extending from a ground connection along a side wall of the cover to a cross member contiguous with a primary cover wall that extends over the semiconductor device between the components to be isolated electromagnetically.Type: ApplicationFiled: April 22, 2016Publication date: August 18, 2016Inventors: Lakshminarayn Viswanathan, Michael E. Watts, David F. Abdo
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Publication number: 20160181992Abstract: A method, packaged semiconductor device, and system for controlling a secondary amplifier output current based on an input signal received from an amplifier input, converting electrical energy to magnetic energy at a secondary amplifier output inductor, coupling the magnetic energy from the secondary amplifier output inductor to a primary amplifier output inductor, converting the coupled magnetic energy to induced electrical energy at the primary amplifier output inductor, combining the induced electrical energy with output electrical energy from a primary amplifier gain element, and applying a combined electrical energy including the output electrical energy and the induced electrical energy to a primary amplifier load are provided.Type: ApplicationFiled: December 17, 2014Publication date: June 23, 2016Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Damon G. Holmes, Ramanujam Srinidhi Embar, Joseph Staudinger, Michael E. Watts
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Patent number: 9349693Abstract: A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electrically conductive material is coupled to the cover in between components of the semiconductor device, with the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. In one version, the isolation structure includes a first leg extending from a ground connection along a side wall of the cover to a cross member contiguous with a primary cover wall that extends over the semiconductor device between the components to be isolated electromagnetically.Type: GrantFiled: August 5, 2014Date of Patent: May 24, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Viswanathan Lakshminarayan, Michael E. Watts, David F. Abdo
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Publication number: 20160126905Abstract: An embodiment of an amplifier has a bandwidth defined by low and upper cutoff frequencies. The amplifier includes an input impedance matching circuit and a transistor. The transistor has a gate, a first current conducting terminal coupled to an output of the amplifier, and a second current conducting terminal coupled to a reference node. The input impedance matching circuit has a filter input coupled to an input of the amplifier, a filter output coupled to the gate of the transistor, and a multiple pole filter coupled between the filter input and the filter output. A first pole of the filter is positioned at a first frequency within the bandwidth, and a second pole of the filter is positioned at a second frequency outside the bandwidth. The input impedance matching circuit is configured to filter the input RF signal to produce a filtered RF signal at the filter output.Type: ApplicationFiled: October 31, 2014Publication date: May 5, 2016Inventors: LEI ZHAO, Jeffrey K. Jones, Basim H. Noori, Michael E. Watts
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Publication number: 20160093587Abstract: A packaged RF device is provided that can provide improved performance and flexibility though the use of flexible circuit leads. The RF device includes at least one integrated circuit (IC) die configured to implement the RF device. The IC die is contained inside a package. In accordance with the embodiments described herein, a flexible circuit is implemented as a lead. Specifically, the flexible circuit lead is coupled to the at least one IC die inside the package and extends to outside the package, the flexible circuit lead thus providing an electrical connection to the at least one IC die inside the package.Type: ApplicationFiled: September 29, 2014Publication date: March 31, 2016Applicant: Freescale Semiconductor, Inc.Inventors: Lakshminarayan VISWANATHAN, Michael E. WATTS
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Publication number: 20160043039Abstract: A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electrically conductive material is coupled to the cover in between components of the semiconductor device, with the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. In one version, the isolation structure includes a first leg extending from a ground connection along a side wall of the cover to a cross member contiguous with a primary cover wall that extends over the semiconductor device between the components to be isolated electromagnetically.Type: ApplicationFiled: August 5, 2014Publication date: February 11, 2016Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Viswanathan Lakshminarayan, Michael E. Watts, David F. Abdo
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Patent number: 9252715Abstract: A variable-bias power amplifier is provided, comprising: a first variable voltage source generating first bias voltages based on bias control signals; a first amplifier circuit amplifying an output RF signal to generate a first amplified signal based on the first bias voltages; a second variable voltage source generating second bias voltages based on the bias control signals; a second amplifier circuit amplifying the output RF signal to generate a second amplified signal based on the second bias voltages; and a DC isolation circuit between the first amplifier circuit and the second amplifier circuit, electrically isolating DC currents at the first amplifier from DC currents at the second amplifier, wherein the first variable voltage source can be controlled independently from the second variable voltage source, and the first amplifier circuit, the second amplifier circuit, and the DC isolation circuit are all formed on a single die.Type: GrantFiled: March 14, 2014Date of Patent: February 2, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Jeffrey K. Jones, Paul R. Hart, Michael E. Watts
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Publication number: 20150381121Abstract: An embodiment of an integrated passive device (IPD) assembly includes a first capacitor formed over a semiconductor substrate, where the first capacitor includes a first capacitor electrode, a second capacitor electrode, and dielectric material that electrically insulates the first capacitor electrode from the second capacitor electrode. The IPD assembly also includes a first contact pad exposed at a top surface of the IPD assembly and electrically coupled to the second capacitor electrode, and a second contact pad exposed at the top surface of the IPD. A second capacitor is coupled to the top surface of the IPD, and includes a first terminal electrically coupled to the first contact pad, and a second terminal electrically coupled to the second contact pad. The IPD assembly may be included in a packaged RF device, forming portions of an output impedance matching circuit and an envelope frequency termination circuit.Type: ApplicationFiled: June 27, 2014Publication date: December 31, 2015Inventors: Jeffrey K. Jones, Basim H. Noori, Michael E. Watts
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Publication number: 20150311131Abstract: A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling is presented. The semiconductor device has a substrate on which a first circuit and a second circuit with inputs and outputs are formed proximate to each other. An isolation structure of electrically conductive material is located between components of the first and second circuits, the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. The isolation structure may be positioned on or over exterior surfaces of the semiconductor device housing or inside the housing. In one embodiment, the isolation structure includes a first leg extending transverse to the surface of the substrate and a first cross member connected to and projecting from the first leg over the substrate.Type: ApplicationFiled: April 25, 2014Publication date: October 29, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Michael E. Watts, Shun Meen Kuo, Margaret A. Szymanowski
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Publication number: 20150263677Abstract: A variable-bias power amplifier is provided, comprising: a first variable voltage source generating first bias voltages based on bias control signals; a first amplifier circuit amplifying an output RF signal to generate a first amplified signal based on the first bias voltages; a second variable voltage source generating second bias voltages based on the bias control signals; a second amplifier circuit amplifying the output RF signal to generate a second amplified signal based on the second bias voltages; and a DC isolation circuit between the first amplifier circuit and the second amplifier circuit, electrically isolating DC currents at the first amplifier from DC currents at the second amplifier, wherein the first variable voltage source can be controlled independently from the second variable voltage source, and the first amplifier circuit, the second amplifier circuit, and the DC isolation circuit are all formed on a single die.Type: ApplicationFiled: March 14, 2014Publication date: September 17, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Jeffrey K. JONES, Paul R. HART, Michael E. WATTS
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Publication number: 20150235933Abstract: A semiconductor device, related package, and method of manufacturing same are disclosed. In at least one embodiment, the semiconductor device includes a radio frequency (RF) power amplifier transistor having a first port, a second port, and a third port. The semiconductor device also includes an output lead, a first output impedance matching circuit between the second port and the output lead, and a first additional circuit coupled between the output lead and a ground terminal. At least one component of the first additional circuit is formed at least in part by way of one or more of a plurality of castellations and a plurality of vias.Type: ApplicationFiled: February 19, 2014Publication date: August 20, 2015Applicant: Freescale Semiconductor, Inc.Inventors: Hussain H. Ladhani, Lu Li, Mahesh K. Shah, Lakshminarayan Viswanathan, Michael E. Watts
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Patent number: 9032841Abstract: A housing for a transmission is disclosed. The housing may have a plurality of integrally-formed walls that together create an enclosure with an open first end and an open second end disposed axially opposite the first end. The housing may also have a first flange located at the first end of the enclosure and configured to engage an input housing of an engine, and a second flange located at the second end of the enclosure and configured to engage a differential housing. The plurality of integrally formed walls includes a lower wall having at least one impingement protection feature.Type: GrantFiled: April 30, 2012Date of Patent: May 19, 2015Assignee: Caterpillar Inc.Inventors: Paul D. Cashatt, Darryl I. Hudson, Michael E. Watts, Cory J. Deppert, Michael G. Eddingfield
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Patent number: 9013246Abstract: The embodiments described herein can provide improved signal feeding between hybrid couplers and associated transistors. As such, these embodiments can improve the performance of amplifiers and other such RF devices that utilize these components. In one embodiment a device includes a distribution network and a compensation resonator. The distribution network is configured to output a signal through a relatively wide output feedline. This relatively wide output feedline provides distributed signal feeding that can improve signal distribution and performance. The output feedline is coupled to the compensation resonator. In general, the compensation resonator is configured to resonate with the distribution network at the frequency band of the signal. Thus, the distribution network and compensation resonator together can provide improved signal distribution while maintaining performance at the frequencies of interest.Type: GrantFiled: August 1, 2013Date of Patent: April 21, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Damon G. Holmes, Jeffrey K. Jones, Joseph Staudinger, Michael E. Watts
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Publication number: 20150035604Abstract: The embodiments described herein can provide improved signal feeding between hybrid couplers and associated transistors. As such, these embodiments can improve the performance of amplifiers and other such RF devices that utilize these components. In one embodiment a device includes a distribution network and a compensation resonator. The distribution network is configured to output a signal through a relatively wide output feedline. This relatively wide output feedline provides distributed signal feeding that can improve signal distribution and performance. The output feedline is coupled to the compensation resonator. In general, the compensation resonator is configured to resonate with the distribution network at the frequency band of the signal. Thus, the distribution network and compensation resonator together can provide improved signal distribution while maintaining performance at the frequencies of interest.Type: ApplicationFiled: August 1, 2013Publication date: February 5, 2015Applicant: Freescale Semiconductor, Inc.Inventors: Damon G. HOLMES, Jeffrey K. JONES, Joseph STAUDINGER, Michael E. WATTS
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Publication number: 20130283971Abstract: A housing for a transmission is disclosed. The housing may have a plurality of integrally-formed walls that together create an enclosure with an open first end and an open second end disposed axially opposite the first end. The housing may also have a first flange located at the first end of the enclosure and configured to engage an input housing of an engine, and a second flange located at the second end of the enclosure and configured to engage a differential housing. The plurality of integrally formed walls includes a lower wall having at least one impingement protection feature.Type: ApplicationFiled: April 30, 2012Publication date: October 31, 2013Inventors: Paul D. CASHATT, Darryl I. Hudson, Michael E. Watts, Cory J. Deppert, Michael G. Eddingfield
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Patent number: 4056710Abstract: A system for decoding encoded character information characterized by a plurality of bars of alternating light reflective characteristics of one or more widths in applications such as reader/scanner systems utilizing a decision tree technique that enables decoding to take place on line in real time.Type: GrantFiled: April 16, 1976Date of Patent: November 1, 1977Assignee: Coherent RadiationInventors: Robert C. Shepardson, Michael E. Watts