Patents by Inventor Michael F. Miller

Michael F. Miller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7117345
    Abstract: A method of executing more than one thread at a time in a computer system that has a plurality of threads, including a first and second thread. The method comprises providing a first and a second reorder buffer, reading first instructions and first operands associated with the first thread from the first reorder buffer, executing one of the first instructions and storing a result in the first reorder buffer which includes marking the result with a tag associating the result with the first thread, reading second instructions and second operands associated with the second thread from the second reorder buffer, and executing one of the second instructions and storing a result in the second reorder buffer which includes marking the result with a tag associating the result with the second thread.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: October 3, 2006
    Assignee: Intel Corporation
    Inventors: Kenneth J. Janik, Shih-Lien L. Lu, Michael F. Miller
  • Patent number: 6916083
    Abstract: An acoustic device is provided comprising a reservoir adapted to contain a fluid and having an exterior surface, an acoustic radiation generator for generating acoustic radiation, and a means for delivering an acoustic coupling fluid to the exterior surface of the reservoir. The acoustic radiation generator is placed in acoustic coupling relationship via the acoustic coupling fluid to the reservoir. Acoustic radiation generated by the acoustic radiation generator is transmitted through the exterior surface and into any fluid contained in the reservoir. Uncontrolled flow of the acoustic coupling fluid at the exterior surface as a result of movement of the acoustic radiation generator is eliminated. Also provided are methods that eliminate such uncontrolled flow.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: July 12, 2005
    Assignee: Labcyte Inc.
    Inventors: Michael F. Miller, Glen Krueger, Lawrence Lee, Jr., David S. Lee
  • Patent number: 6836366
    Abstract: A tunable Fabry-Perot filter includes an optical cavity bounded by a stationary reflector and a deformable or movable membrane reflector. A second electrostatic cavity outside of the optical cavity includes a pair of electrodes, one of which is mechanically coupled to the movable membrane reflector. A voltage applied to the electrodes across the electrostatic cavity causes deflection of the membrane, thereby changing the length of the optical cavity and tuning the filter. The filter with the movable membrane can be formed by micro device photolithographic and fabrication processes from a semiconductor material in an integrated device structure. The membrane can include an inner movable membrane portion connected within an outer body portion by a pattern of tethers. The tether pattern can be such that straight or radial tethers connect the inner membrane with the outer body. Alternatively, a tether pattern with tethers arranged in a substantially spiral pattern can be used.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: December 28, 2004
    Assignee: Axsun Technologies, Inc.
    Inventors: Dale C. Flanders, Peter S. Whitney, Michael F. Miller, Stanley R. Shanfield, David B. West, Minh Van Le
  • Publication number: 20040187119
    Abstract: A system and method of executing instructions within a counterflow pipeline processor. The counterflow pipeline processor includes an instruction pipeline, a data pipeline, a reorder buffer and a plurality of execution units. An instruction and one or more operands issue into the instruction pipeline and a determination is made at one of the execution units whether the instruction is ready for execution. If so, the operands are loaded into the execution unit and the instruction executes. The execution unit is monitored for a result and, when the result arrives, it is stored into the result pipeline. If the instruction reaches the end of the pipeline without executing it wraps around and is sent down the instruction pipeline again.
    Type: Application
    Filed: December 9, 2003
    Publication date: September 23, 2004
    Applicant: Intel Corporation
    Inventors: Kenneth J. Janik, Shih-Lien L. Lu, Michael F. Miller
  • Patent number: 6790698
    Abstract: A process for patterning dielectric layers of the type typically found in optical coatings in the context of MEMS manufacturing is disclosed. A dielectric coating is deposited over a device layer, which has or will be released, and patterned using a mask layer. In one example, the coating is etched using the mask layer as a protection layer. In another example, a lift-off process is shown. The primary advantage of photolithographic patterning of the dielectric layers in optical MEMS devices is that higher levels of consistency can be achieved in fabrication, such as size, location, and residual material stress. Competing techniques such as shadow masking yield lower quality features and are difficult to align. Further, the minimum feature size that can be obtained with shadow masks is limited to ˜100 &mgr;m, depending on the coating system geometry, and they require hard contact with the surface of the wafer, which can lead to damage and/or particulate contamination.
    Type: Grant
    Filed: September 18, 2001
    Date of Patent: September 14, 2004
    Assignee: Axsun Technologies, Inc.
    Inventors: Michael F. Miller, Minh Van Le, Christopher C. Cook, Dale C. Flanders, Steven F. Nagle
  • Patent number: 6776538
    Abstract: In optoelectronic systems, package moisture can affect stress levels in dielectric coatings on MEMS devices. Specifically, as the moisture content in these dielectric coatings changes, there are concomitant changes in the material stress. These changes in material stress can affect the operation of the overall MEMS device. Specifically, in the context of tunable filters, moisture can lead to a drift in the size of the optical resonant cavity over time as changes in material stress affect the MEMS structures. According to the invention, a getter is added to the package to absorb moisture, and thereby stabilize the operation of the optical filter, and specifically prevent uncontrolled drift in the size of its optical cavity.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: August 17, 2004
    Assignee: Axsun Technologies, Inc.
    Inventors: Peter S. Whitney, Jeffrey A. Korn, Michael F. Miller, Raymond V. Pourmand
  • Patent number: 6765710
    Abstract: Tabs or stops are integrated into a membrane structure to prevent its snapdown. Features comprising two surfaces separated by a distance equal to the maximum desired range of movement are produced. When the two surfaces contact, the motion of the structure is arrested or greatly diminished by increasing its rigidity. For an electrostatically actuated MEMS structure, these features can be used to limit the range of motion such that pull-in or snapdown is avoided, greatly enhancing the reliability of the device. One key design feature is that the two contacting surfaces are maintained at the same electrical potential avoiding problems associated with electrostatic cavity discharge.
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: July 20, 2004
    Assignee: Axsun Technologies, Inc.
    Inventors: Michael F. Miller, Dale C. Flanders
  • Patent number: 6691222
    Abstract: A system and method of executing instructions within a counterflow pipeline processor. The counterflow pipeline processor includes an instruction pipeline, a data pipeline, a reorder buffer and a plurality of execution units. An instruction and one or more operands issue into the instruction pipeline and a determination is made at one of the execution units whether the instruction is ready for execution. If so, the operands are loaded into the execution unit and the instruction executes. The execution unit is monitored for a result and, when the result arrives, it is stored into the result pipeline. If the instruction reaches the end of the pipeline without executing it wraps around and is sent down the instruction pipeline again.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: February 10, 2004
    Assignee: Intel Corporation
    Inventors: Kenneth J. Janik, Shih-Lien L. Lu, Michael F. Miller
  • Publication number: 20030177340
    Abstract: A system and method of executing instructions within a counterflow pipeline processor. The counterflow pipeline processor includes an instruction pipeline, a data pipeline, a reorder buffer and a plurality of execution units. An instruction and one or more operands issue into the instruction pipeline and a determination is made at one of the execution units whether the instruction is ready for execution. If so, the operands are loaded into the execution unit and the instruction executes. The execution unit is monitored for a result and, when the result arrives, it is stored into the result pipeline. If the instruction reaches the end of the pipeline without executing it wraps around and is sent down the instruction pipeline again.
    Type: Application
    Filed: March 18, 2003
    Publication date: September 18, 2003
    Applicant: Intel Corporation
    Inventors: Kenneth J. Janik, Shih-Lien L. Lu, Michael F. Miller
  • Patent number: 6608711
    Abstract: A process for fabricating an optical membrane device comprises providing a handle wafer and then oxidizing a surface of the handle wafer to form an insulating layer. A device wafer is then bonded to the handle wafer. An optical membrane structure is formed in this device wafer. The insulating layer is selectively removed to release the membrane structure. This device wafer can be manufactured from silicon wafer material. Such material typically has a low number of dislocations yielding a stable mechanical membrane structure. The insulating layer defines the electrical cavity across which electrical fields are established that are used to electrostatically deflect the membrane structure. The insulating layer is between 3 and 6 micrometers (&mgr;m) in thickness.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: August 19, 2003
    Assignee: Axsun Technologies, Inc.
    Inventors: Dale C. Flanders, Peter S. Whitney, Michael F. Miller
  • Publication number: 20030108306
    Abstract: In optoelectronic systems, package moisture can affect stress levels in dielectric coatings on MEMS devices. Specifically, as the moisture content in these dielectric coatings changes, there are concomitant changes in the material stress. These changes in material stress can affect the operation of the overall MEMS device. Specifically, in the context of tunable filters, moisture can lead to a drift in the size of the optical resonant cavity over time as changes in material stress affect the MEMS structures. According to the invention, a getter is added to the package to absorb moisture, and thereby stabilize the operation of the optical filter, and specifically prevent uncontrolled drift in the size of its optical cavity.
    Type: Application
    Filed: December 12, 2001
    Publication date: June 12, 2003
    Applicant: AXSUN Technologies, Inc.
    Inventors: Peter S. Whitney, Jeffrey A. Korn, Michael F. Miller, Raymond V. Pourmand
  • Patent number: 6553485
    Abstract: A system and method of executing instructions within a counterflow pipeline processor. The counterflow pipeline processor includes an instruction pipeline, a data pipeline, a reorder buffer and a plurality of execution units. An instruction and one or more operands issue into the instruction pipeline and a determination is made at one of the execution units whether the instruction is ready for execution. If so, the operands are loaded into the execution unit and the instruction executes. The execution unit is monitored for a result and, when the result arrives, it is stored into the result pipeline. If the instruction reaches the end of the pipeline without executing it wraps around and is sent down the instruction pipeline again.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: April 22, 2003
    Assignee: Intel Corporation
    Inventors: Kenneth J. Janik, Shih-Lien L. Lu, Michael F. Miller
  • Patent number: 6538798
    Abstract: An electrostatically driven optical membrane comprises a support structure and a membrane structure separated from the support structure by an electrostatic cavity. Stiction plugs are formed in the membrane structure. The plugs extend from a surface of the membrane. In one implementation, the plugs are hollow to allow a subsequent release process in which the sacrificial layer is removed.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: March 25, 2003
    Assignee: Axsun Technologies, Inc.
    Inventors: Michael F. Miller, Martin A. Schmidt
  • Patent number: 6525880
    Abstract: A tunable Fabry-Perot filter includes an optical cavity bounded by a stationary reflector and a deformable or movable membrane reflector. A second electrostatic cavity outside of the optical cavity includes a pair of electrodes, one of which is mechanically coupled to the movable membrane reflector. A voltage applied to the electrodes across the electrostatic cavity causes deflection of the membrane, thereby changing the length of the optical cavity and tuning the filter. The filter with the movable membrane can be formed by micro device photolithographic and fabrication processes from a semiconductor material in an integrated device structure. The membrane can include an inner movable membrane portion connected within an outer body portion by a pattern of tethers. The tether pattern can be such that straight or radial tethers connect the inner membrane with the outer body. Alternatively, a tether pattern with tethers arranged in a substantially spiral pattern can be used.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: February 25, 2003
    Assignee: Axsun Technologies, Inc.
    Inventors: Dale C. Flanders, Peter S. Whitney, Minh Van Le, Michael F. Miller, Stanley R. Shanfield
  • Publication number: 20020099928
    Abstract: A system and method of executing instructions within a counterflow pipeline processor. The counterflow pipeline processor includes an instruction pipeline, a data pipeline, a reorder buffer and a plurality of execution units. An instruction and one or more operands issue into the instruction pipeline and a determination is made at one of the execution units whether the instruction is ready for execution. If so, the operands are loaded into the execution unit and the instruction executes. The execution unit is monitored for a result and, when the result arrives, it is stored into the result pipeline. If the instruction reaches the end of the pipeline without executing it wraps around and is sent down the instruction pipeline again.
    Type: Application
    Filed: January 22, 2002
    Publication date: July 25, 2002
    Applicant: Intel Corporation
    Inventors: Kenneth J. Janik, Shih-Lien L. Lu, Michael F. Miller
  • Publication number: 20020072015
    Abstract: Tabs or stops are integrated into a membrane structure to prevent its snapdown. Features comprising two surfaces separated by a distance equal to the maximum desired range of movement are produced. When the two surfaces contact, the motion of the structure is arrested or greatly diminished by increasing its rigidity. For an electrostatically actuated MEMS structure, these features can be used to limit the range of motion such that pull-in or snapdown is avoided, greatly enhancing the reliability of the device. One key design feature is that the two contacting surfaces are maintained at the same electrical potential avoiding problems associated with electrostatic cavity discharge.
    Type: Application
    Filed: December 10, 2001
    Publication date: June 13, 2002
    Applicant: AXSUN Technologies, Inc.
    Inventors: Michael F. Miller, Dale C. Flanders
  • Publication number: 20020071170
    Abstract: An electrostatically driven optical membrane comprises a support structure and a membrane structure separated from the support structure by an electrostatic cavity. Stiction plugs are formed in the membrane structure. The plugs extend from a surface of the membrane. In one implementation, the plugs are hollow to allow a subsequent release process in which the sacrificial layer is removed.
    Type: Application
    Filed: December 11, 2000
    Publication date: June 13, 2002
    Inventors: Michael F. Miller, Martin A. Schmidt
  • Publication number: 20020048839
    Abstract: A process for patterning dielectric layers of the type typically found in optical coatings in the context of MEMS manufacturing is disclosed. A dielectric coating is deposited over a device layer, which has or will be released, and patterned using a mask layer. In one example, the coating is etched using the mask layer as a protection layer. In another example, a lift-off process is shown. The primary advantage of photolithographic patterning of the dielectric layers in optical MEMS devices is that higher levels of consistency can be achieved in fabrication, such as size, location, and residual material stress. Competing techniques such as shadow masking yield lower quality features and are difficult to align. Further, the minimum feature size that can be obtained with shadow masks is limited to ˜100 &mgr;m, depending on the coating system geometry, and they require hard contact with the surface of the wafer, which can lead to damage and/or particulate contamination.
    Type: Application
    Filed: September 18, 2001
    Publication date: April 25, 2002
    Applicant: AXSUN Technologies, Inc.
    Inventors: Michael F. Miller, Minh Van Le, Christopher C. Cook, Dale C. Flanders, Steven F. Nagle
  • Patent number: 6351805
    Abstract: A system and method of executing instructions within a counterflow pipeline processor. The counterflow pipeline processor includes an instruction pipeline, a data pipeline, a reorder buffer and a plurality of execution units. An instruction and one or more operands issue into the instruction pipeline and a determination is made at one of the execution units whether the instruction is ready for execution. If so, the operands are loaded into the execution unit and the instruction executes. The execution unit is monitored for a result and, when the result arrives, it is stored into the result pipeline. If the instruction reaches the end of the pipeline without executing it wraps around and is sent down the instruction pipeline again.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: February 26, 2002
    Assignee: Intel Corporation
    Inventors: Kenneth J. Janik, Shih-Lien L. Lu, Michael F. Miller
  • Publication number: 20020018385
    Abstract: A process for fabricating an optical membrane device comprises providing a handle wafer and then oxidizing a surface of the handle wafer to form an insulating layer. A device wafer is then bonded to the handle wafer. An optical membrane structure is formed in this device wafer. The insulating layer is selectively removed to release the membrane structure. This device wafer can be manufactured from silicon wafer material. Such material typically has a low number of dislocations yielding a stable mechanical membrane structure. The insulating layer defines the electrical cavity across which electrical fields are established that are used to electrostatically deflect the membrane structure. The insulating layer is between 3 and 6 micrometers (&mgr;m) in thickness.
    Type: Application
    Filed: December 11, 2000
    Publication date: February 14, 2002
    Inventors: Dale C. Flanders, Peter S. Whitney, Michael F. Miller