Patents by Inventor Michael F. Pas

Michael F. Pas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140315377
    Abstract: Semiconductor devices and fabrication methods are provided, in which fully silicided gates are provided. A lanthanide series metal is implanted into the gate electrode layer prior to silicidation and diffuses into the gate dielectric during an activation anneal. This process and resultant structure provides adjustment of the gate electrode work function, thereby tuning the threshold voltage of the resulting transistor.
    Type: Application
    Filed: July 1, 2014
    Publication date: October 23, 2014
    Inventors: Manfred Ramin, Michael F. Pas, Husam N. Alshareef
  • Patent number: 8802519
    Abstract: Semiconductor devices and fabrication methods are provided, in which fully silicided gates are provided. A lanthanide series metal is implanted into the gate electrode layer prior to silicidation and diffuses into the gate dielectric during an activation anneal. This process and resultant structure provides adjustment of the gate electrode work function, thereby tuning the threshold voltage of the resulting transistor.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: August 12, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Manfred Ramin, Michael F. Pas, Husam N. Alshareef
  • Patent number: 8749115
    Abstract: An orthotic device comprises a flexible support structure comprising at least one surface for contacting a body part of a user, a plurality of pressure sensors configured for coupling to a microcontroller, and a plurality of displacement regions. Each region defines a portion of said flexible support structure, wherein each portion includes at least one sensor disposed on or below the at least one surface and at least one electrically deformable unit. Each unit comprises at least one electroactive material and is configured for coupling to the microcontroller and to a power source. The device is dynamically adjustable to change its shape and support properties, when an electrical voltage is applied to the electroactive material under the control of a microcontroller.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: June 10, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Sylvia D. Pas, Michael F. Pas
  • Publication number: 20130324887
    Abstract: An orthotic device comprises a flexible support structure comprising at least one surface for contacting a body part of a user, a plurality of pressure sensors configured for coupling to a microcontroller, and a plurality of displacement regions. Each region defines a portion of said flexible support structure, wherein each portion includes at least one sensor disposed on or below the at least one surface and at least one electrically deformable unit. Each unit comprises at least one electroactive material and is configured for coupling to the microcontroller and to a power source. The device is dynamically adjustable to change its shape and support properties, when an electrical voltage is applied to the electroactive material under the control of a microcontroller.
    Type: Application
    Filed: August 2, 2013
    Publication date: December 5, 2013
    Inventors: Sylvia D. Pas, Michael F. Pas
  • Patent number: 8525386
    Abstract: An orthotic device comprises a flexible support structure comprising at least one surface for contacting a body part of a user, a plurality of pressure sensors configured for coupling to a microcontroller, and a plurality of displacement regions. Each region defines a portion of said flexible support structure, wherein each portion includes at least one sensor disposed on or below the at least one surface and at least one electrically deformable unit. Each unit comprises at least one electroactive material and is configured for coupling to the microcontroller and to a power source. The device is dynamically adjustable to change its shape and support properties, when an electrical voltage is applied to the electroactive material under the control of a microcontroller.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: September 3, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Sylvia D. Pas, Michael F. Pas
  • Patent number: 8409943
    Abstract: Semiconductor devices and fabrication methods are provided, in which fully silicided gates are provided. A lanthanide series metal is implanted into the gate electrode layer prior to silicidation and diffuses into the gate dielectric during an activation anneal. This process and resultant structure provides adjustment of the gate electrode work function, thereby tuning the threshold voltage of the resulting transistor.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: April 2, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Manfred Ramin, Michael F. Pas, Husam Alshareef
  • Patent number: 8304333
    Abstract: A method for manufacturing a semiconductor device includes forming a gate electrode over a gate dielectric. The gate dielectric is formed by forming a lanthanide metal layer over a nitrided silicon oxide layer, and then performing an anneal to inter-diffuse atoms to form a lanthanide silicon oxynitride layer. A gate electrode layer may be deposited before or after the anneal. In an embodiment, the gate electrode layer includes a non-lanthanide metal layer, a barrier layer formed over the non-lanthanide metal layer, and a polysilicon layer formed over the barrier layer. Hafnium atoms may optionally be implanted into the nitrided silicon oxide layer.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: November 6, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Manfred Ramin, Michael F. Pas, Husam Alshareef
  • Publication number: 20110223757
    Abstract: Semiconductor devices and fabrication methods are provided, in which fully silicided gates are provided. A lanthanide series metal is implanted into the gate electrode layer prior to silicidation and diffuses into the gate dielectric during an activation anneal. This process and resultant structure provides adjustment of the gate electrode work function, thereby tuning the threshold voltage of the resulting transistor.
    Type: Application
    Filed: December 28, 2010
    Publication date: September 15, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Manfred Ramin, Michael F. Pas, Husam Alshareef
  • Publication number: 20110131838
    Abstract: An orthotic device comprises a flexible support structure comprising at least one surface for contacting a body part of a user, a plurality of pressure sensors configured for coupling to a microcontroller, and a plurality of displacement regions. Each region defines a portion of said flexible support structure, wherein each portion includes at least one sensor disposed on or below the at least one surface and at least one electrically deformable unit. Each unit comprises at least one electroactive material and is configured for coupling to the microcontroller and to a power source. The device is dynamically adjustable to change its shape and support properties, when an electrical voltage is applied to the electroactive material under the control of a microcontroller.
    Type: Application
    Filed: December 9, 2009
    Publication date: June 9, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sylvia D. PAS, Michael F. PAS
  • Publication number: 20110006375
    Abstract: A method for manufacturing a semiconductor device includes forming a gate electrode over a gate dielectric. The gate dielectric is formed by forming a lanthanide metal layer over a nitrided silicon oxide layer, and then performing an anneal to inter-diffuse atoms to form a lanthanide silicon oxynitride layer. A gate electrode layer may be deposited before or after the anneal. In an embodiment, the gate electrode layer includes a non-lanthanide metal layer, a barrier layer formed over the non-lanthanide metal layer, and a polysilicon layer formed over the barrier layer. Hafnium atoms may optionally be implanted into the nitrided silicon oxide layer.
    Type: Application
    Filed: September 21, 2010
    Publication date: January 13, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Manfred Ramin, Michael F. Pas, Husam Alshareef
  • Patent number: 7858459
    Abstract: Semiconductor devices and fabrication methods are provided, in which fully silicided transistor gates are provided for MOS transistors. A lanthanide series metal is implanted into the gate electrode layer prior to silicidation and diffuses into the gate dielectric during an activation anneal. This process and resultant structure provides adjustment of the gate electrode work function, thereby tuning the threshold voltage of the resulting transistor.
    Type: Grant
    Filed: April 20, 2007
    Date of Patent: December 28, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Manfred Ramin, Michael F. Pas, Husam Alshareef
  • Patent number: 7807522
    Abstract: Semiconductor devices and fabrication methods are provided, in which metal transistor gates are provided for MOS transistors. Metal nitride is formed above a gate dielectric. A lanthaide series metal is implanted into the metal screen layer above the gate dielectric. The lanthaide metal is contained in the screen layer or at the interface between the screen metal layer and the gate dielectric. This process provides adjustment of the gate electrode work function, thereby tuning the threshold voltage of the resulting PMOS or NMOS transistors.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: October 5, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Husam Alshareef, Manfred Ramin, Michael F. Pas
  • Patent number: 7799669
    Abstract: A method for manufacturing a semiconductor device. The method comprises forming a dielectric layer. Forming the dielectric layer includes depositing a silicon oxide layer on a semiconductor substrate, nitridating the silicon oxide layer to form a nitrided silicon oxide layer and incorporating lanthanide atoms into the nitrided silicon oxide layer to form a lanthanide silicon oxynitride layer.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: September 21, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Manfred Ramin, Michael F. Pas, Husam Alshareef
  • Patent number: 7795097
    Abstract: One aspect of the invention provides a semiconductor device that includes gate electrodes comprising a metal or metal alloy located over a semiconductor substrate, wherein the gate electrodes are free of spacer sidewalls. The device further includes source/drains having source/drain extensions associated therewith, located in the semiconductor substrate and adjacent each of the gate electrodes. A first pre-metal dielectric layer is located on the sidewalls of the gate electrodes and over the source/drains, and a second pre-metal dielectric layer is located on the first pre-metal dielectric layer. Contact plugs extend through the first and second pre-metal dielectric layers.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: September 14, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Michael F. Pas
  • Patent number: 7642153
    Abstract: A method of forming an integrated circuit can include the steps of providing a substrate having a semiconducting surface and forming a plurality of semiconducting multilayer features on the substrate surface, the features comprising a base layer and a compositionally different capping layer on the base layer. The method can also include forming spacers on sidewalls of the plurality of features, etching the capping layer, where the etching comprises selectively removing the capping layer, removing at least a portion of the base layer to form a plurality of trenches, and forming gate electrodes in the trenches.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: January 5, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Michael F. Pas
  • Publication number: 20090127632
    Abstract: One aspect of the invention provides a semiconductor device that includes gate electrodes comprising a metal or metal alloy located over a semiconductor substrate, wherein the gate electrodes are free of spacer sidewalls. The device further includes source/drains having source/drain extensions associated therewith, located in the semiconductor substrate and adjacent each of the gate electrodes. A first pre-metal dielectric layer is located on the sidewalls of the gate electrodes and over the source/drains, and a second pre-metal dielectric layer is located on the first pre-metal dielectric layer. Contact plugs extend through the first and second pre-metal dielectric layers.
    Type: Application
    Filed: November 20, 2007
    Publication date: May 21, 2009
    Applicant: Texas Instruments Incorporated
    Inventor: Michael F. Pas
  • Publication number: 20090104742
    Abstract: A method of forming an integrated circuit can include the steps of providing a substrate having a semiconducting surface and forming a plurality of semiconducting multilayer features on the substrate surface, the features comprising a base layer and a compositionally different capping layer on the base layer. The method can also include forming spacers on sidewalls of the plurality of features, etching the capping layer, where the etching comprises selectively removing the capping layer, removing at least a portion of the base layer to form a plurality of trenches, and forming gate electrodes in the trenches.
    Type: Application
    Filed: October 23, 2007
    Publication date: April 23, 2009
    Applicant: Texas Instruments Incorporated
    Inventor: Michael F. Pas
  • Publication number: 20080265336
    Abstract: A method for manufacturing a semiconductor device. The method comprises forming a dielectric layer. Forming the dielectric layer includes depositing a silicon oxide layer on a semiconductor substrate, nitridating the silicon oxide layer to form a nitrided silicon oxide layer and incorporating lanthanide atoms into the nitrided silicon oxide layer to form a lanthanide silicon oxynitride layer.
    Type: Application
    Filed: April 27, 2007
    Publication date: October 30, 2008
    Applicant: Texas Instruments Incorporated
    Inventors: Manfred Ramin, Michael F. Pas, Husam Alshareef
  • Publication number: 20080261368
    Abstract: Semiconductor devices and fabrication methods are provided, in which fully silicided transistor gates are provided for MOS transistors. A lanthanide series metal is implanted into the gate electrode layer prior to silicidation and diffuses into the gate dielectric during an activation anneal. This process and resultant structure provides adjustment of the gate electrode work function, thereby tuning the threshold voltage of the resulting transistor.
    Type: Application
    Filed: April 20, 2007
    Publication date: October 23, 2008
    Inventors: Manfred Ramin, Michael F. Pas, Husam Alshareef
  • Publication number: 20080160736
    Abstract: Semiconductor devices and fabrication methods are provided, in which metal transistor gates are provided for MOS transistors. Metal nitride is formed above a gate dielectric. A lanthaide series metal is implanted into the metal screen layer above the gate dielectric. The lanthaide metal is contained in the screen layer or at the interface between the screen metal layer and the gate dielectric. This process provides adjustment of the gate electrode work function, thereby tuning the threshold voltage of the resulting PMOS or NMOS transistors.
    Type: Application
    Filed: January 31, 2007
    Publication date: July 3, 2008
    Inventors: Husam Alshareef, Manfred Ramin, Michael F. Pas