Abstract: A power amplifier system is disclosed that includes a power amplifier having a first signal input, a first signal output, second signal input, and a second signal output. The power amplifier system further includes cross-coupled bias circuitry having a first transistor with a first collector coupled to the first signal input, a first base coupled to the second signal input, and a first emitter coupled to a fixed voltage node, a second transistor with a second collector coupled to the second signal input, a second base coupled to the first signal input, and a second emitter coupled to the fixed voltage node.

Abstract: A power amplifier linearization circuit and related apparatus is provided. In examples disclosed herein, the power amplifier linearization circuit includes an analog pre-distortion (APD) circuit coupled to an input of a power amplifier. Notably, the power amplifier can exhibit linearity response deviation, namely linearity amplitude response deviation and linearity phase response deviation, when amplifying a radio frequency (RF) signal under a compression condition. As such, the APD circuit is configured to receive a control signal corresponding to the linearity response deviation and pre-process the RF signal based on the control signal before providing the RF signal to the power amplifier. As a result, it may be possible to reduce the linearity response deviation in the power amplifier, thus helping to improve linearity and RF performance of the power amplifier.

Abstract: A power amplifier linearization circuit and related apparatus is provided. In examples disclosed herein, the power amplifier linearization circuit includes an analog pre-distortion (APD) circuit coupled to an input of a power amplifier. Notably, the power amplifier can exhibit linearity response deviation, namely linearity amplitude response deviation and linearity phase response deviation, when amplifying a radio frequency (RF) signal under a compression condition. As such, the APD circuit is configured to receive a control signal corresponding to the linearity response deviation and pre-process the RF signal based on the control signal before providing the RF signal to the power amplifier. As a result, it may be possible to reduce the linearity response deviation in the power amplifier, thus helping to improve linearity and RF performance of the power amplifier.

Abstract: A power amplifier system having a power amplifier with a signal input and a signal output, bias circuitry coupled to the signal input, and a radio frequency (RF) peak detector having an input coupled to the signal output is disclosed. The RF peak detector is configured to generate a peak voltage signal. Temperature-compensated overvoltage protection circuitry coupled between an output of the RF peak detector and a control input of the bias circuitry is configured to respond to the peak voltage signal crossing over a predetermined peak voltage threshold and to provide an overvoltage protection control signal to cause the bias circuitry to adjust biasing for the power amplifier to reduce an overvoltage condition at the RF peak detector input.

Abstract: A power amplifier system is disclosed that includes a power amplifier having a first signal input, a first signal output, second signal input, and a second signal output. The power amplifier system further includes cross-coupled bias circuitry having a first transistor with a first collector coupled to the first signal input, a first base coupled to the second signal input, and a first emitter coupled to a fixed voltage node, a second transistor with a second collector coupled to the second signal input, a second base coupled to the first signal input, and a second emitter coupled to the fixed voltage node.

Abstract: Embodiments of electronic devices, such as integrated circuit (IC) packages are disclosed. In one embodiment, an electronic device includes a first substrate and a second substrate. The first substrate has a first substrate body and a first inductor portion integrated into the first substrate body. Additionally, the second substrate comprises a second substrate body and a second inductor portion integrated into the second substrate body. The second substrate is mounted on the first substrate such that such that the second inductor portion is positioned over the first inductor portion and such that the second inductor portion is electrically connected to the first inductor portion so that the first inductor portion and the second inductor portion form a three dimensional (3D) inductor. By using two substrates, the 3D inductor can be increased in height while still allowing the substrates to be miniaturized and standardized for an IC package.

Abstract: A power amplifier system having a power amplifier with a signal input and a signal output, bias circuitry coupled to the signal input, and a radio frequency (RF) peak detector having an input coupled to the signal output is disclosed. The RF peak detector is configured to generate a peak voltage signal. Temperature-compensated overvoltage protection circuitry coupled between an output of the RF peak detector and a control input of the bias circuitry is configured to respond to the peak voltage signal crossing over a predetermined peak voltage threshold and to provide an overvoltage protection control signal to cause the bias circuitry to adjust biasing for the power amplifier to reduce an overvoltage condition at the RF peak detector input.

Abstract: A power amplifier system is disclosed that includes a power amplifier having a first signal input, a first signal output, second signal input, and a second signal output. The power amplifier system further includes cross-coupled bias circuitry having a first transistor with a first collector coupled to the first signal input, a first base coupled to the second signal input, and a first emitter coupled to a fixed voltage node, a second transistor with a second collector coupled to the second signal input, a second base coupled to the first signal input, and a second emitter coupled to the fixed voltage node.

Abstract: A power amplifier system is disclosed that includes a power amplifier having a first signal input, a first signal output, second signal input, and a second signal output. The power amplifier system further includes cross-coupled bias circuitry having a first transistor with a first collector coupled to the first signal input, a first base coupled to the second signal input, and a first emitter coupled to a fixed voltage node, a second transistor with a second collector coupled to the second signal input, a second base coupled to the first signal input, and a second emitter coupled to the fixed voltage node.

Abstract: A phased array antenna system having a plurality of antenna elements arranged into an array is disclosed. Each of a plurality of amplifier circuitries has an output terminal coupled to a corresponding one of the plurality of antenna elements and includes a power amplifier having a control terminal coupled to an input terminal. The power amplifier has a first current terminal coupled to the output terminal and a second current terminal coupled to a fixed voltage node. Further included in each of the plurality of amplifier circuitries is a current limiter having a bias terminal coupled to the control terminal of the power amplifier to adjust a bias point of the power amplifier to limit current flowing through the first current terminal and the second current terminal to within a predetermined current range. Some embodiments also include a voltage limiter to limit voltage amplitude at the output terminal.

Abstract: A phased array antenna system having a plurality of antenna elements arranged into an array is disclosed. Each of a plurality of amplifier circuitries has an output terminal coupled to a corresponding one of the plurality of antenna elements and includes a power amplifier having a control terminal coupled to an input terminal. The power amplifier has a first current terminal coupled to the output terminal and a second current terminal coupled to a fixed voltage node. Further included in each of the plurality of amplifier circuitries is a current limiter having a bias terminal coupled to the control terminal of the power amplifier to adjust a bias point of the power amplifier to limit current flowing through the first current terminal and the second current terminal to within a predetermined current range. Some embodiments also include a voltage limiter to limit voltage amplitude at the output terminal.

Abstract: A phased array antenna system having a plurality of antenna elements arranged into an array is disclosed. Each of a plurality of amplifier circuitries has an output terminal coupled to a corresponding one of the plurality of antenna elements and includes a power amplifier having a control terminal coupled to an input terminal. The power amplifier has a first current terminal coupled to the output terminal and a second current terminal coupled to a fixed voltage node. Further included in each of the plurality of amplifier circuitries is a current limiter having a bias terminal coupled to the control terminal of the power amplifier to adjust a bias point of the power amplifier to limit current flowing through the first current terminal and the second current terminal to within a predetermined current range. Some embodiments also include a voltage limiter to limit voltage amplitude at the output terminal.

Abstract: A phased array antenna system having a plurality of antenna elements arranged into an array is disclosed. Each of a plurality of amplifier circuitries has an output terminal coupled to a corresponding one of the plurality of antenna elements and includes a power amplifier having a control terminal coupled to an input terminal. The power amplifier has a first current terminal coupled to the output terminal and a second current terminal coupled to a fixed voltage node. Further included in each of the plurality of amplifier circuitries is a current limiter having a bias terminal coupled to the control terminal of the power amplifier to adjust a bias point of the power amplifier to limit current flowing through the first current terminal and the second current terminal to within a predetermined current range. Some embodiments also include a voltage limiter to limit voltage amplitude at the output terminal.

Abstract: A phased array antenna system having a plurality of antenna elements arranged into an array is disclosed. Each of a plurality of amplifier circuitries has an output terminal coupled to a corresponding one of the plurality of antenna elements and includes a power amplifier having a control terminal coupled to an input terminal. The power amplifier has a first current terminal coupled to the output terminal and a second current terminal coupled to a fixed voltage node. Further included in each of the plurality of amplifier circuitries is a current limiter having a bias terminal coupled to the control terminal of the power amplifier to adjust a bias point of the power amplifier to limit current flowing through the first current terminal and the second current terminal to within a predetermined current range. Some embodiments also include a voltage limiter to limit voltage amplitude at the output terminal.

Abstract: Radio frequency (RF) transmission line transformers are disclosed. Unlike conventional transformers that employ magnetic cores that transmit energy from input to output through magnetic flux linkages, the embodiments of the RF transmission line transformer disclosed herein transfer energy by configuring transformer coils as balanced transmission lines. More specifically, the RF transmission line transformers have a primary transformer coil that forms at least one primary winding and a secondary transformer coil that forms at least a pair of secondary windings. The primary winding of the primary transformer coil is disposed between the pair of secondary windings so that the primary winding forms a different balanced transmission line with each one of the pair of secondary windings. This results in greater bandwidth and higher transformer power efficiency (TPE) at RF frequencies.

Abstract: Embodiments of electronic devices, such as integrated circuit (IC) packages are disclosed. In one embodiment, an electronic device includes a first substrate and a second substrate. The first substrate has a first substrate body and a first inductor portion integrated into the first substrate body. Additionally, the second substrate comprises a second substrate body and a second inductor portion integrated into the second substrate body. The second substrate is mounted on the first substrate such that such that the second inductor portion is positioned over the first inductor portion and such that the second inductor portion is electrically connected to the first inductor portion so that the first inductor portion and the second inductor portion form a three dimensional (3D) inductor. By using two substrates, the 3D inductor can be increased in height while still allowing the substrates to be miniaturized and standardized for an IC package.

Abstract: In one embodiment, a balanced to unbalanced transformer utilizes a crossover configuration such that some portion of the secondary coil (inductor) is shared between two resonators (capacitors). Adding a first capacitor in parallel with a portion of the secondary inductor creates a first harmonic trap (filter), and also efficiently uses the secondary coil (inductor) as a resonating element. Adding a second capacitor which shares (crossover configuration) a portion of the secondary inductor with the first capacitor creates a second harmonic trap (filter), which may be tuned to the same harmonic as the first harmonic trap, or may be tuned to a different harmonic.

Abstract: This disclosure relates to hybrid couplers for radio frequency (RF) signals. The hybrid coupler includes a first port, a second port, a third port, a fourth port, a first inductive element connected from the first port to the third port, and a second inductive element connected from the second port to the fourth port. The hybrid coupler further includes a first capacitive element and a second capacitive element. The first capacitive element is connected between an intermediary node of the first inductive element and either the first port or the third port, while the second capacitive element is coupled between an intermediary node of the second inductive element and either the second port or the fourth port. Accordingly, the first capacitive element and a portion of the first inductive element and the second capacitive element and a portion of the second capacitive element each form a harmonic trap.

Abstract: Radio frequency (RF) transmission line transformers are disclosed. Unlike conventional transformers that employ magnetic cores that transmit energy from input to output through magnetic flux linkages, the embodiments of the RF transmission line transformer disclosed herein transfer energy by configuring transformer coils as balanced transmission lines. More specifically, the RF transmission line transformers have a primary transformer coil that forms at least one primary winding and a secondary transformer coil that forms at least a pair of secondary windings. The primary winding of the primary transformer coil is disposed between the pair of secondary windings so that the primary winding forms a different balanced transmission line with each one of the pair of secondary windings. This results in greater bandwidth and higher transformer power efficiency (TPE) at RF frequencies.

Abstract: This disclosure relates to hybrid couplers for radio frequency (RF) signals. The hybrid coupler includes a first port, a second port, a third port, a fourth port, a first inductive element connected from the first port to the third port, and a second inductive element connected from the second port to the fourth port. The hybrid coupler further includes a first capacitive element and a second capacitive element. The first capacitive element is connected between an intermediary node of the first inductive element and either the first port or the third port, while the second capacitive element is coupled between an intermediary node of the second inductive element and either the second port or the fourth port. Accordingly, the first capacitive element and a portion of the first inductive element and the second capacitive element and a portion of the second capacitive element each form a harmonic trap.