Patents by Inventor Michael Fera

Michael Fera has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Shielded bit line architecture for memory arrays
    Patent number: 6304479
    Abstract: A memory array, in accordance with the invention, includes a plurality of memory cells disposed in an array. A plurality of bitlines are included for reading and writing data to and from the memory cells. The plurality of bitlines include a first group of bitlines and a second group of bitlines. Each bitline of the first group is interposed between bitlines of the second group, and each bitline of the second group is interposed between bitlines of the first group. The first group of bitlines are active when the second group of bitlines are inactive, and the second group of bitlines are active when the first group of bitlines are inactive such that adjacent inactive bitlines provide a shield to prevent cross-coupling between active bitlines.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: October 16, 2001
    Assignees: Infineon Technologies North America Corp., Infineon Technologies Richmond, LP
    Inventors: Joerg Vollrath, Michael Fera, Philip Moore