Patents by Inventor Michael Fogarty
Michael Fogarty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12239785Abstract: A ventilation system having a mask, a blowing assembly, and a processor. The mask has a mask body and a pressure sensor operatively associated with the mask body and configured to measure pressure within the mask. The mask body defines an inlet opening and a plurality of leak openings. The blowing assembly is positioned in fluid communication with the inlet opening of the mask body and configured to direct air to the inlet opening of the mask body. The processor is positioned in operative communication with the blowing assembly and the pressure sensor of the mask. The processor is configured to selectively control the blowing assembly based upon at least the measured pressure within the mask.Type: GrantFiled: August 18, 2021Date of Patent: March 4, 2025Assignee: University of Utah Research FoundationInventors: Michael Fogarty, Joseph Orr, Kai Kuck
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Publication number: 20240395797Abstract: There is provided a semiconductor device and a method of manufacturing the same. The method includes depositing an epitaxial layer on a semiconductor substrate of a first conductivity type. The epitaxial layer is of a second conductivity type opposite to the first conductivity type. Depositing the epitaxial layer includes depositing a first epi-layer of a first doping concentration, a second epi-layer of a second doping concentration and a third epi-layer of a third doping concentration, with the semiconductor substrate and the first epi-layer forming a first P-N junction at their interface, and the second epi-layer arranged between the first and third epi-layers. The second doping concentration is higher than the first and third doping concentrations. A doped region of the first conductivity type is formed at a surface of the third epi-layer. The doped region and the third epi-layer form a second P-N junction at their interface.Type: ApplicationFiled: August 2, 2024Publication date: November 28, 2024Inventors: Michael Fogarty Cahir, Stephen Geoffrey Badcock
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Patent number: 12154978Abstract: Processor elements are described herein. A processor element comprises a silicon layer. The processor element further comprises one or more conductive electrodes. The processor element further comprises dielectric material having a non-uniform thickness, the dielectric material disposed at least between the silicon layer and the one or more conductive electrodes. In use, when a bias potential is applied to one or more of the conductive electrodes, the positioning of the one or more conductive electrodes and the non-uniform thickness of the dielectric material together define an electric field profile to induce a quantum dot at an interface between the silicon layer and the dielectric layer. Methods are also described herein.Type: GrantFiled: May 12, 2020Date of Patent: November 26, 2024Assignee: QUANTUM MOTION TECHNOLOGIES LIMITEDInventors: Michael Fogarty, Matthew Schormans, John Morton
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Patent number: 12113059Abstract: There is provided a semiconductor device and a method of manufacturing the same.Type: GrantFiled: December 29, 2022Date of Patent: October 8, 2024Assignee: Diodes IncorporatedInventors: Michael Fogarty Cahir, Stephen Geoffrey Badcock
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Patent number: 12035644Abstract: A device for quantum information processing is disclosed herein. According to examples, the device comprises a first plurality of confinement regions for confining spinful charge carriers for use as data qudits. The device further comprises a second plurality of confinement regions for confining spinful charge carriers for use as ancillary qudits, each confinement region of the second plurality of confinement regions couplable to measurement apparatus for measuring an ancillary qudit. The device further comprises a third plurality of confinement regions for confining spinful charge carriers, each confinement region of the third plurality of confinement regions situated between a first confinement region of the first plurality of confinement regions and a second confinement region of the second plurality of confinement regions and for use in mediating interactions between a data qudit of the first confinement region and an ancillary qudit of the second confinement region.Type: GrantFiled: March 10, 2020Date of Patent: July 9, 2024Assignee: QUANTUM MOTION TECHNOLOGIES LIMITEDInventors: John Morton, Michael Fogarty, Simon Schaal, Sofia Patomaki
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Patent number: 12026588Abstract: Methods are disclosed for controlling charge stability in a device for quantum information processing. According to examples, a device for quantum information processing comprises a first plurality of confinement regions confining spinful charge carriers for use as qudits. The device further comprises a second plurality of confinement regions confining spinful charge carriers, each confinement region of the second plurality of confinement regions adjacent to a confinement region of the first plurality of confinement regions. The device further comprises one or more charge reservoirs, wherein each confinement region of the second plurality of confinement regions is attachable to a charge reservoir.Type: GrantFiled: March 10, 2020Date of Patent: July 2, 2024Assignees: QUANTUM MOTION TECHNOLOGIES LIMITED, OXFORD UNIVERSITY INNOVATION LIMITEDInventors: Simon Benjamin, Zhenyu Cai, John Morton, Michael Fogarty, Simon Schaal, Sofia Patomaki
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Publication number: 20240021602Abstract: There is provided a semiconductor device and a method of manufacturing the same.Type: ApplicationFiled: December 29, 2022Publication date: January 18, 2024Inventors: Michael Fogarty Cahir, Stephen Geoffrey Badcock
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Patent number: 11665980Abstract: Processor elements are disclosed herein. A processor element comprises a silicon layer. The processor element further comprises a dielectric layer disposed upon and forming an interface with the silicon layer. The processor element further comprises a conductive via in contact with the dielectric layer, the conductive via comprising a metallic portion having an interface end closest to the dielectric layer and a distal end. A cross-sectional area of the interface end of the metallic portion of the conductive via is less than or equal to 100 nm by 100 nm. In use, the application of a bias potential to the distal end of the conductive via induces a quantum dot at the interface between the dielectric layer and the silicon layer, the quantum dot for confining one or more electrons or holes in the silicon layer. Methods are also described herein.Type: GrantFiled: May 12, 2020Date of Patent: May 30, 2023Assignee: QUANTUM MOTION TECHNOLOGIES LIMITEDInventors: Michael Fogarty, Matthew Schormans, John Morton
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Publication number: 20230142559Abstract: A silicon-based quantum device for confining charge carriers is provided.Type: ApplicationFiled: March 12, 2021Publication date: May 11, 2023Inventors: Michael Fogarty, John Morton
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Publication number: 20220336648Abstract: Processor elements are described herein. A processor element comprises a silicon layer. The processor element further comprises one or more conductive electrodes. The processor element further comprises dielectric material having a non-uniform thickness, the dielectric material disposed at least between the silicon layer and the one or more conductive electrodes. In use, when a bias potential is applied to one or more of the conductive electrodes, the positioning of the one or more conductive electrodes and the non-uniform thickness of the dielectric material together define an electric field profile to induce a quantum dot at an interface between the silicon layer and the dielectric layer. Methods are also described herein.Type: ApplicationFiled: May 12, 2020Publication date: October 20, 2022Inventors: Michael Fogarty, Matthew Schormans, John Morton
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Publication number: 20220223779Abstract: Processor elements are disclosed herein. A processor element comprises a silicon layer. The processor element further comprises a dielectric layer disposed upon and forming an interface with the silicon layer. The processor element further comprises a conductive via in contact with the dielectric layer, the conductive via comprising a metallic portion having an interface end closest to the dielectric layer and a distal end. A cross-sectional area of the interface end of the metallic portion of the conductive via is less than or equal to 100 nm by 100 nm. In use, the application of a bias potential to the distal end of the conductive via induces a quantum dot at the interface between the dielectric layer and the silicon layer, the quantum dot for confining one or more electrons or holes in the silicon layer. Methods are also described herein.Type: ApplicationFiled: May 12, 2020Publication date: July 14, 2022Inventors: Michael Fogarty, Matthew Schormans, John Morton
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Publication number: 20220164695Abstract: A device for quantum information processing is disclosed herein. According to examples, the device comprises a first plurality of confinement regions for confining spinful charge carriers for use as data qudits. The device further comprises a second plurality of confinement regions for confining spinful charge carriers for use as ancillary qudits, each confinement region of the second plurality of confinement regions couplable to measurement apparatus for measuring an ancillary qudit. The device further comprises a third plurality of confinement regions for confining spinful charge carriers, each confinement region of the third plurality of confinement regions situated between a first confinement region of the first plurality of confinement regions and a second confinement region of the second plurality of confinement regions and for use in mediating interactions between a data qudit of the first confinement region and an ancillary qudit of the second confinement region.Type: ApplicationFiled: March 10, 2020Publication date: May 26, 2022Inventors: John Morton, Michael Fogarty, Simon Schaal, Sofia Patomaki
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Publication number: 20220156629Abstract: Methods are disclosed for controlling charge stability in a device for quantum information processing. According to examples, a device for quantum information processing comprises a first plurality of confinement regions confining spinful charge carriers for use as audits. The device further comprises a second plurality of confinement regions confining spinful charge carriers, each confinement region of the second plurality of confinement regions adjacent to a confinement region of the first plurality of confinement regions. The device further comprises one or more charge reservoirs, wherein each confinement region of the second plurality of confinement regions is attachable to a charge reservoir.Type: ApplicationFiled: March 10, 2020Publication date: May 19, 2022Inventors: Simon Benjamin, Zhenyu Cai, John Morton, Michael Fogarty, Simon Schaal, Sofia Patomaki
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Patent number: 11266801Abstract: A ventilation system having a mask, a blowing assembly, and a processor. The mask has a mask body and a pressure sensor operatively associated with the mask body and configured to measure pressure within the mask. The mask body defines an inlet opening and a plurality of leak openings. The blowing assembly is positioned in fluid communication with the inlet opening of the mask body and configured to direct air to the inlet opening of the mask body. The processor is positioned in operative communication with the blowing assembly and the pressure sensor of the mask. The processor is configured to selectively control the blowing assembly based upon at least the measured pressure within the mask.Type: GrantFiled: October 7, 2016Date of Patent: March 8, 2022Assignee: University of Utah Research FoundationInventors: Michael Fogarty, Joseph Orr, Kai Kuck
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Publication number: 20220040428Abstract: A ventilation system having a mask, a blowing assembly, and a processor. The mask has a mask body and a pressure sensor operatively associated with the mask body and configured to measure pressure within the mask. The mask body defines an inlet opening and a plurality of leak openings. The blowing assembly is positioned in fluid communication with the inlet opening of the mask body and configured to direct air to the inlet opening of the mask body. The processor is positioned in operative communication with the blowing assembly and the pressure sensor of the mask. The processor is configured to selectively control the blowing assembly based upon at least the measured pressure within the mask.Type: ApplicationFiled: August 18, 2021Publication date: February 10, 2022Inventors: Michael Fogarty, Joseph Orr, Kai Kuck
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Patent number: 10309223Abstract: Various embodiments include apparatuses and systems for controlling rotational imbalance of a rotary element. In one embodiment, a rotational imbalance reduction apparatus includes at least one heating element for heating a location on a rotary element, a pulsing element configured to pulse actuate the heating element in synchronization with a multiple, fraction, or mixed fraction of the frequency of rotation of the rotary element, and a control system coupled with the pulsing element and the heating element, the control system actuating the heating element and the pulsing element to apply heat to the location of the rotary element in pulses synchronized with the multiple, fraction, or mixed fraction of the frequency of rotation of the rotary element.Type: GrantFiled: September 15, 2016Date of Patent: June 4, 2019Assignee: General Electric CompanyInventors: Immanuel Safari Zadeh, James Michael Fogarty, Mateusz Wojciech Golebiowski
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Publication number: 20190070374Abstract: A ventilation system having a mask, a blowing assembly, and a processor. The mask has a mask body and a pressure sensor operatively associated with the mask body and configured to measure pressure within the mask. The mask body defines an inlet opening and a plurality of leak openings. The blowing assembly is positioned in fluid communication with the inlet opening of the mask body and configured to direct air to the inlet opening of the mask body. The processor is positioned in operative communication with the blowing assembly and the pressure sensor of the mask. The processor is configured to selectively control the blowing assembly based upon at least the measured pressure within the mask.Type: ApplicationFiled: October 7, 2016Publication date: March 7, 2019Inventors: Michael Fogarty, Joseph Orr, Kai Kuck
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Patent number: 9322478Abstract: A system includes an electrodynamically suspended seal. The electrodynamically suspended seal includes a first element that includes an electrically conducting material and a second element that includes a magnetic material. At least one of the first and second elements is configured to rotate about an axial axis. The first and second elements are disposed adjacent one another. The rotational movement of at least one of the first and second elements creates a levitation force such that the first and second elements are repelled away from one another. The electrodynamically suspended seal also includes a third element configured to create a counteracting force.Type: GrantFiled: July 31, 2012Date of Patent: April 26, 2016Assignee: General Electric CompanyInventors: Anurag Singh, Nestor Hernandez Sanchez, James Michael Fogarty
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Patent number: 8754615Abstract: An approach for converting a synchronous generator to a synchronous condenser is disclosed. In one aspect, a variable frequency driver is used to provide a starting power source to accelerate a synchronous generator decoupled from a turbine to an operational speed to act as a synchronous condenser. In another aspect, the synchronous condenser can be recoupled back to the turbine to form the synchronous generator.Type: GrantFiled: June 1, 2011Date of Patent: June 17, 2014Assignee: General Electric CompanyInventors: James Michael Fogarty, Gary Edward Gottung, David Mark Stuebner
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Publication number: 20140035231Abstract: A system includes an electrodynamically suspended seal. The electrodynamically suspended seal includes a first element that includes an electrically conducting material and a second element that includes a magnetic material. At least one of the first and second elements is configured to rotate about an axial axis. The first and second elements are disposed adjacent one another. The rotational movement of at least one of the first and second elements creates a levitation force such that the first and second elements are repelled away from one another. The electrodynamically suspended seal also includes a third element configured to create a counteracting force.Type: ApplicationFiled: July 31, 2012Publication date: February 6, 2014Applicant: GENERAL ELECTRIC COMPANYInventors: Anurag Singh, Nestor Hernandez Sanchez, James Michael Fogarty