Abstract: A method for planarizing a metal conductor layer embedded in a dielectric layer is provided. The method includes removing a portion of an overburden of the metal conductor layer that is formed over the dielectric layer with a first CMP slurry. The method also includes removing a remaining portion of the overburden of the metal conductor layer with a second CMP slurry to expose upper portions of the dielectric layer.

Abstract: A structure and method for fabricating a top strap in a magnetic random access memory, MRAM, comprising a damascene process forming a trench in a dielectric layer and resulting in a metal conductor clad on three sides by an inverted U-shape trench liner and cap made up of three layers consisting of a stack of a ferromagnetic material sandwiched between two layers of a refractory metal or an alloy of a refractory metal. First the two sidewalls of the trench are formed with the cladding layer, followed by filling the trench with the metal conductor. In preparing the structure for the capping layer, the metal conductor is recessed with an etch that is selective to the metal conductor over the sidewall stack. This preparation may be performed on selected metal filled trenches and blocked on others, such that after a final polishing step, only those metal conductors that received the recess operation will have the capping layer.

Abstract: Slurry compositions comprising an oxidizing agent, optionally a copper corrosion inhibitor, abrasive particles; surface active agent, a service of chloride and a source of sulfate ions.

Abstract: A wafer polishing tool is disclosed which includes a polishing platen which is rotatable about a central platen axis, and a wafer carrier which supports a wafer for rotational movement to cause a portion of a surface of the wafer to only intermittently contact a polishing surface of the platen while the wafer rotates. The polishing tool may include a plurality of vertically stacked polishing platens which are rotatable about a central platen axis, and a plurality of stacked wafer carriers, wherein each carrier supports a wafer for rotational movement and vertical movement into contact with one of the polishing platens. During polishing, the carrier pack maintains the wafers in uninterrupted contact with the platen over less than entire surfaces of the wafers.

Abstract: A system for chemical-mechanical polishing is described which includes a wafer backing film having concentric first and second portions. The portions of the wafer backing film are of different materials. The second portion of the wafer backing film has an annular shape and surrounds the first portion; a backing shim is used to adjust the first portion and second portion with respect to each other in a vertical direction. The first and second portions of the wafer backing film and the backing shim are mounted on an adhesive assembly film, thereby forming an assembly for mounting on a wafer carrier. The second portion of the wafer backing film is less compressible than the first portion, and is adjusted in the vertical direction so that the outer edge of the wafer is substantially sealed when backside air is applied to the wafer during a film removal process.

Abstract: A wafer polishing tool is disclosed which includes a polishing platen which is rotatable about a central platen axis, and a wafer carrier which supports a wafer for rotational movement to cause a portion of a surface of the wafer to only intermittently contact a polishing surface of the platen while the wafer rotates. The polishing tool may include a plurality of vertically stacked polishing platens which are rotatable about a central platen axis, and a plurality of stacked wafer carriers, wherein each carrier supports a wafer for rotational movement and vertical movement into contact with one of the polishing platens. During polishing, the carrier pack maintains the wafers in uninterrupted contact with the platen over less than entire surfaces of the wafers.

Abstract: A semiconductor device or other suitable substrate and method with single or multi layers of buried micro pipes are disclosed. This is achieved by controlling the aspect ratio of trenches as well as controlling the deposition characteristics of the material used to fill the trenches. A buried micro pipe is formed by filling a trench that has a height which is larger than a width thereof, so that the trench filler material lines sidewalls and bottom of the trench, and covers the top of the trench to form the micro pipe within the trench. Another layer can be formed over the filler material and planarized. Alternatively, the filler material itself can be planarized. Forming trenches in the planarized layer, and repeating the above steps forms a second set of buried micro pipes in these new trenches. This forms a semiconductor device having multiple layer of buried micro pipes.

Abstract: A wafer polishing tool is disclosed which includes a polishing platen which is rotatable about a central platen axis, and a wafer carrier which supports a wafer for rotational movement to cause a portion of a surface of the wafer to only intermittently contact a polishing surface of the platen while the wafer rotates. The polishing tool may include a plurality of vertically stacked polishing platens which are rotatable about a central platen axis, and a plurality of stacked wafer carriers, wherein each carrier supports a wafer for rotational movement and vertical movement into contact with one of the polishing platens. During polishing, the carrier pack maintains the wafers in uninterrupted contact with the platen over less than entire surfaces of the wafers.

Abstract: A system for chemical-mechanical polishing is described which includes a wafer backing film having concentric first and second portions, and a wafer carrier having corresponding first and second portions for mounting the portions of the wafer backing film thereon. The portions of the wafer backing film are of different materials. The second portion of the wafer backing film has an annular shape and surrounds the first portion; the second portion of the wafer carrier is adjustable with respect to the first portion of the wafer carrier in a vertical direction. The second portion of the wafer backing film is less compressible than the first portion, and is adjusted in the vertical direction so that the outer edge of the wafer is substantially sealed when backside air is applied to the wafer during a film removal process.

Abstract: A semiconductor device or other suitable substrate and method with single or multi layers of buried micro pipes are disclosed. This is achieved by controlling the aspect ratio of trenches as well as controlling the deposition characteristics of the material used to fill the trenches. A buried micro pipe is formed by filling a trench that has a height which is larger than a width thereof, so that the trench filler material lines sidewalls and bottom of the trench, and covers the top of the trench to form the micro pipe within the trench. Another layer can be formed over the filler material and planarized. Alternatively, the filler material itself can be planarized. Forming trenches in the planarized layer, and repeating the above steps forms a second set of buried micro pipes in these new trenches. This forms a semiconductor device having multiple layer of buried micro pipes. Via holes may be etched to contact a micro pipe, or to inter connect micro pipes buried at different levels.

Abstract: A device and method for preventing settlement of particles on a chemical-mechanical polishing pad is provided. Specifically, a device capable of preventing settlement of particles on the pad is located between the polishing pad and a platen of a chemical-mechanical polishing apparatus.