Patents by Inventor Michael G. Farrell

Michael G. Farrell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4199380
    Abstract: A method for fabricating self-aligned, walled emitter, oxide isolated integrated circuits. A layer of oxidation resistant material is formed on an oxide isolated epitaxial layer on a silicon substrate. A pattern of apertures is opened in the oxidation resistant layer to expose portions of the epitaxial layer. The apertures extend across the oxide isolated silicon material and define the spaces between the contacts of the active devices of the circuit. Dopant impurities are applied through these apertures to form an inactive base region. The substrate is heated in an oxidizing ambient to form a relatively thick oxide on a portion of the epitaxial layer exposed through the apertures. The oxidation resistant layer is again selectively etched to expose those portions of the epitaxial layer where the active device regions are to be formed. In this step a single mask is used to open a plurality of device regions.
    Type: Grant
    Filed: November 13, 1978
    Date of Patent: April 22, 1980
    Assignee: Motorola, Inc.
    Inventors: Michael G. Farrell, Sal T. Mastroianni