Patents by Inventor Michael G. Rosenfield

Michael G. Rosenfield has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6798682
    Abstract: An integrated circuit that may include an array such as a static random access memory (SRAM) with high threshold device array devices and in selected other devices to reduce leakage. Devices with high threshold have a thicker gate oxide or a high k dielectric gate oxide that is selected based on threshold voltage (VT) variations with gate oxide dielectric type or gate oxide thickness for the particular technology, e.g., PD SOI CMOS. High threshold devices may be used in non-core circuits, e.g., test circuits. Also, non-critical paths may be identified and a non-critical path margin identified. A thicker device threshold is selected for non-critcal path FETs based on the non-critical path margin. Non-critical path delays are re-checked. FETs are formed with the selected thicker gate oxide for any non-critical paths passing the re-check and in array FETs with non-selected FETs being formed with normal gate oxide thickness.
    Type: Grant
    Filed: November 29, 2002
    Date of Patent: September 28, 2004
    Assignee: International Business Machines Corp.
    Inventors: Ching-Te K. Chuang, Rajiv V. Joshi, Michael G. Rosenfield
  • Publication number: 20040105300
    Abstract: An integrated circuit that may include an array such as a static random access memory (SRAM) with high threshold device array devices and in selected other devices to reduce leakage. Devices with high threshold have a thicker gate oxide or a high k dielectric gate oxide that is selected based on threshold voltage (VT) variations with gate oxide dielectric type or gate oxide thickness for the particular technology, e.g., PD SOI CMOS. High threshold devices may be used in non-core circuits, e.g., test circuits. Also, non-critical paths may be identified and a non-critical path margin identified. A thicker device threshold is selected for non-critcal path FETs based on the non-critical path margin. Non-critical path delays are re-checked. FETs are formed with the selected thicker gate oxide for any non-critical paths passing the re-check and in array FETs with non-selected FETs being formed with normal gate oxide thickness.
    Type: Application
    Filed: November 29, 2002
    Publication date: June 3, 2004
    Inventors: Ching-Te K. Chuang, Rajiv V. Joshi, Michael G. Rosenfield
  • Patent number: 5051598
    Abstract: A proximity effect correction method for electron beam lithography suitable for high voltages and/or very dense patterns applies both backscatter and forward scatter dose corrections. Backscatter dose corrections are determined by computing two matrices, a "Proximity Matrix" P and a "Fractional Density Matrix" F. The Proximity Matrix P is computed using known algorithms. The elements of the Fractional Density Matrix are the fractional shape coverage in a mesh of square cells which is superimposed on a pattern of interest. Then, a Dose Correction Matrix D is computed by convolving the P and F matrices. The final backscatter dose corrections are assigned to each shape either as area-weighted averages of the D matrix elements for all cells spanned by the shape, or by polynomial or other interpolation of the dose correction field defined by the D matrix. The D matrix also provides a basis for automatic shape fracturing for optimal proximity correction.
    Type: Grant
    Filed: September 12, 1990
    Date of Patent: September 24, 1991
    Assignee: International Business Machines Corporation
    Inventors: Christopher J. Ashton, Porter D. Gerber, Dieter P. Kern, Walter W. Molzen, Jr., Stephen A. Rishton, Michael G. Rosenfield, Raman G. Viswanathan
  • Patent number: 4752668
    Abstract: A system for removing excess material from a semiconductor wafer employs an excimer laser for ablative photocomposition. A wafer is positioned on an X-Y stage that is computer controlled to position the wafer at points where the laser may be focused to remove excess material whether over alignment marks or identified contamination. The laser passes through a vacuum chamber which by generating an inward laminar flow constrains any particulate contamination resulting from the ablative photodecomposition from spreading. This material is removed by the vacuum system.
    Type: Grant
    Filed: April 28, 1986
    Date of Patent: June 21, 1988
    Inventors: Michael G. Rosenfield, David E. Seeger