Patents by Inventor Michael Gdula

Michael Gdula has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6040226
    Abstract: A method is provided for the manufacture of precision electronic components such as resistors, inductors, and capacitors on a polymer or ceramic surface. The electronic components can be deposited and trimmed to precise or matched values without having precise depositions of all of the pre-patterned materials. Thin film electronic components are deposited on a surface, parameter values are measured or estimated, a correction offset file is generated, and the components are trimmed using adaptive lithography to a very close tolerance. A computer program can be used to enable the adjustment of electronic components by techniques such as changing the physical length of an inductor coil or resistor lead, or by changing a capacitor plate area.
    Type: Grant
    Filed: October 23, 1998
    Date of Patent: March 21, 2000
    Assignee: General Electric Company
    Inventors: Robert John Wojnarowski, James Wilson Rose, Ernest Wayne Balch, Leonard Richard Douglas, Evan Taylor Downey, Michael Gdula
  • Patent number: 5872040
    Abstract: A method is provided for the manufacture of precision electronic components such as resistors, inductors, and capacitors on a polymer or ceramic surface. The electronic components can be deposited and trimmed to precise or matched values without having precise depositions of all of the pre-patterned materials. Thin film electronic components are deposited on a surface, parameter values are measured or estimated, a correction offset file is generated, and the components are trimmed using adaptive lithography to a very close tolerance. A computer program can be used to enable the adjustment of electronic components by techniques such as changing the physical length of an inductor coil or resistor lead, or by changing a capacitor plate area.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: February 16, 1999
    Assignee: General Electric Company
    Inventors: Robert John Wojnarowski, James Wilson Rose, Ernest Wayne Balch, Leonard Richard Douglas, Evan Taylor Downey, Michael Gdula
  • Patent number: 5849623
    Abstract: A method for fabricating a thin film resistor comprises applying a tantalum nitride layer over a dielectric layer, applying a metallization layer over the tantalum nitride layer, and patterning the metallization layer with a first portion of the metallization layer situated apart from a second portion of the metallization layer and both the first and second portions being at least partially situated on the tantalum nitride layer. In one embodiment, after patterning the metallization layer, the resistance value between the first and second portions of the metallization layer is determined and compared to a predetermined resistance value, and at least one of the first and second portions is trimmed to obtain a modified resistance value between the first and second portions that is closer to the predetermined resistance value than the determined resistance value.
    Type: Grant
    Filed: May 23, 1997
    Date of Patent: December 15, 1998
    Assignee: General Electric Company
    Inventors: Robert John Wojnarowski, James Wilson Rose, Kyung Wook Paik, Michael Gdula
  • Patent number: 5683928
    Abstract: A method is provided for the manufacture of precision electronic components such as resistors, inductors, and capacitors on a polymer or ceramic surface. The electronic components can be deposited and trimmed to precise or matched values without having precise depositions of all of the pre-patterned materials. Thin film electronic components are deposited on a surface, parameter values are measured or estimated, a correction offset file is generated, and the components are trimmed using adaptive lithography to a very close tolerance. A computer program can be used to enable the adjustment of electronic components by techniques such as changing the physical length of an inductor coil or resistor lead, or by changing a capacitor plate area.
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: November 4, 1997
    Assignee: General Electric Company
    Inventors: Robert John Wojnarowski, James Wilson Rose, Ernest Wayne Balch, Leonard Richard Douglas, Evan Taylor Downey, Michael Gdula
  • Patent number: 5675310
    Abstract: A method for fabricating a thin film resistor comprises applying a tantalum nitride layer over a dielectric layer, applying a metallization layer over the tantalum nitride layer, and patterning the metallization layer with a first portion of the metallization layer situated apart from a second portion of the metallization layer and both the first and second portions being at least partially situated on the tantalum nitride layer. In one embodiment, after patterning the metallization layer, the resistance value between the first and second portions of the metallization layer is determined and compared to a predetermined resistance value, and at least one of the first and second portions is trimmed to obtain a modified resistance value between the first and second portions that is closer to the predetermined resistance value than the determined resistance value.
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: October 7, 1997
    Assignee: General Electric Company
    Inventors: Robert John Wojnarowski, James Wilson Rose, Kyung Wook Paik, Michael Gdula
  • Patent number: 5497033
    Abstract: Substrate material is molded directly to semiconductor chips and other electrical components that are positioned for integrated circuit module fabrication. Chips having contact pads are placed face down on a layer of adhesive supported by a base. A mold form is positioned around the chips. Substrate molding material is added within the mold form, and the substrate molding material is then hardened. A dielectric layer having vias aligned with predetermined ones of the contact pads and having an electrical conductor extending through the vias is situated on the hardened substrate molding material and the faces of the chips. A thermal plug may be affixed to the backside of a chip before substrate molding material is added. A connector frame may be placed on the adhesive layer before substrate molding material is added. A dielectric layer may be placed over the backsides of the chips before the substrate molding material is added to enhance repairability.
    Type: Grant
    Filed: June 20, 1994
    Date of Patent: March 5, 1996
    Assignee: Martin Marietta Corporation
    Inventors: Raymond A. Fillion, Robert J. Woinarowski, Michael Gdula, Herbert S. Cole, Eric J. Wildi, Wolfgang Daum
  • Patent number: 5381445
    Abstract: A munitions cartridge transmitter capable of emitting an electromagnetic signal after discharge from a cartridge propelling device comprises a signal generator, an electromagnetic signal transmitter coupled to the generator, an antenna coupled to the transmitter, and a hollow cartridge for housing the generator, the transmitter, and the antenna. The transmitter is energized after discharge of the cartridge propelling device by a power source contained in the cartridge.
    Type: Grant
    Filed: May 3, 1993
    Date of Patent: January 10, 1995
    Assignee: General Electric Company
    Inventors: John E. Hershey, Menahem Lowy, Lionel M. Levinson, Amer A. Hassan, Richard L. Frey, Kenneth B. Welles, II, Michael Gdula, Robert J. Wojnarowski
  • Patent number: 5366906
    Abstract: In fabricating wafer scale integrated interconnects, a temporary or permanent dielectric layer and a pattern of electrical conductors are used to provide wafer scale integration or testing and burn-in. A resist can be used to cover the areas of IC pads on the wafer while the remainder of the pattern of electrical conductors is removed to provide for repair of the wafer scale integration structure. The pattern of electrical conductors may be configured so that the conductor lengths between at least some sub-circuits on a plurality of wafers are substantially electrically equal for signal propagation purposes; an additional wafer may be laminated to the wafer using an adhesive; controlled curfs may be cut into the wafer; and the wafer may be interconnected to an interface ring.
    Type: Grant
    Filed: October 16, 1992
    Date of Patent: November 22, 1994
    Assignee: Martin Marietta Corporation
    Inventors: Robert J. Wojnarowski, Constantine A. Neugebauer, Wolfgang Daum, Bernard Gorowitz, Eric J. Wildi, Michael Gdula, Stanton E. Weaver, Jr., Anthony A. Immorlica, Jr.
  • Patent number: 5353498
    Abstract: Substrate material is molded directly to semiconductor chips and other electrical components that are positioned for integrated circuit module fabrication. Chips having contact pads are placed face down on a layer of adhesive supported by a base. A mold form is positioned around the chips. Substrate molding material is added within the mold form, and the substrate molding material is then hardened. A dielectric layer having vias aligned with predetermined ones of the contact pads and having an electrical conductor extending through the vias is situated on the hardened substrate molding material and the faces of the chips. A thermal plug may be affixed to the backside of a chip before substrate molding material is added. A connector frame may be placed on the adhesive layer before substrate molding material is added. A dielectric layer may be placed over the backsides of the chips before the substrate molding material is added to enhance repairability.
    Type: Grant
    Filed: July 9, 1993
    Date of Patent: October 11, 1994
    Assignee: General Electric Company
    Inventors: Raymond A. Fillion, Robert J. Wojnarowski, Michael Gdula, Herbert S. Cole, Eric J. Wildi, Wolfgang Daum
  • Patent number: 4845608
    Abstract: A speed regulator digital speed controller for rotating machinery is comprised of a single-chip microcontroller operating in conjunction with a multiple counter/time peripheral, and is programmed in a high level language. Pulses are generated by a digital speed sensor at a rate too low to give the required speed resolution; these pulses are counted and a preset number toggles a binary gate signal. Two clock counters both having an input connected to a high reference frequency oscillator are gated alternately and accumulate a count depending on the length of the gated on interval. These speed related counts are read during alternating gated off intervals into the microcontroller where the speed error is calculated in real time to a high degree of accuracy and resolution. The speed of an electric motor and a steam turbine, for instance, are regulated.
    Type: Grant
    Filed: December 21, 1987
    Date of Patent: July 4, 1989
    Assignee: General Electric Company
    Inventor: Michael Gdula
  • Patent number: 4649511
    Abstract: A controller for interfacing a single-chip microcomputer with external dynamic random-access memory, includes a subcircuit for generating a column-address strobe at a time after a row-address strobe is generated, and also includes a multiplexing subcircuit for providing the proper 8-bit portion of a 16-bit address output from the microprocessor to the 8-bit dynamic memory inputs, prior to receipt of the associated row-address or column-address strobe. The microprocessor utilizes the strobe-generation and multiplexing subcircuits to burst-refresh the dynamic memory, in one presently preferred embodiment. In another presently preferred embodiment, lines from an additional microprocessor output port are utilized with a resettable binary counter and a multiplicity of buffers, to count through the range of row addresses in cyclic fashion, with each address being incremented after the previously-addressed row of memory cells has been refreshed.
    Type: Grant
    Filed: July 25, 1983
    Date of Patent: March 10, 1987
    Assignee: General Electric Company
    Inventor: Michael Gdula
  • Patent number: 4327420
    Abstract: A reference generator, providing a plurality of precisely-phased output signals, utilizes a microprocessor having a table of values for the output waveforms stored in a read-only memory thereof. The table entries include a multiplicity of values for providing a stepwise representation of each of the desired waveforms, which may have constant angular increments therebetween. The incremental tabular values are consecutively read responsive to the count in a timer, integral in the microcomputer, which is sequentially advanced by the pulse output of a voltage-to-frequency converter receiving a rate signal. The tabular values are converted to analog polyphase reference signals by a like number, equal to the number of phases, of digital-to-analog converters and associated low-pass filters. The output waveform peak amplitude is established by a dual-polarity reference voltage generator, responsive to a variable level signal.
    Type: Grant
    Filed: June 30, 1980
    Date of Patent: April 27, 1982
    Assignee: General Electric Company
    Inventors: Michael Gdula, Raymond J. Hodsoll, Edwin C. Underkoffler
  • Patent number: 4268779
    Abstract: A circuit for controlling power consumption of a load, by controlling the flow of current thereto, utilizes at least one parallel combination of non-linear resistance elements, such as a varistor and the like, and a gateable semiconductor switching device, such as a triac and the like, to substantially reduce or prevent current flow when the semiconductor switching device is gated to an "off" condition and to enable normal current flow to a load when the semiconductor switching device is gated to an "on" condition. Embodiments of the power circuits for control of magnetron power, in a microwave oven, are illustrated.
    Type: Grant
    Filed: August 13, 1979
    Date of Patent: May 19, 1981
    Assignee: General Electric Company
    Inventors: Charles W. Eichelberger, Rudolph A. Dehn, Michael Gdula, Robert J. Wojnarowski