Patents by Inventor Michael GEHMLICH

Michael GEHMLICH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230243069
    Abstract: A semiconductor single-crystal silicon, is produced from a silicon substrate wafer containing interstitial oxygen in a concentration of more than 5 × 1016 AT/cm3 (new ASTM) by an RTA treatment of the wafer in a first heat treatment at a first temperature in a temperature range of not less than 1200° C. and not more than 1260° C. for a period of not less than 5 s and not more than 30 s, where the front side of the substrate wafer is exposed to an atmosphere containing argon; a second heat treatment at a second temperature in a temperature range of not less than 1150° C. and not more than 1190° C. for a period of not less than 15 s and not more than 20 s, where the front side of the wafer is exposed to an argon and ammonia, atmosphere, and a third heat treatment at a third temperature in a temperature range of not less than 1160° C. and not more than 1190° C. for a period of not less than 20 s and not more than 30 s, where the front side of the wafer is exposed to an atmosphere containing argon.
    Type: Application
    Filed: June 10, 2021
    Publication date: August 3, 2023
    Applicant: SILTRONIC AG
    Inventors: Michael GEHMLICH, Gudrun KISSINGER, Karl MANGELBERGER, Timo MUELLER, Michael SKROBANEK
  • Patent number: 11639558
    Abstract: A method produces a single-crystal silicon semiconductor wafer. A single-crystal silicon substrate wafer is double side polished. A front side of the substrate wafer is chemical mechanical polished (CMP). An epitaxial layer of single-crystal silicon is deposited on the front side of the substrate wafer. A first rapid thermal anneal (RTA) treatment is performed on the coated substrate wafer at 1275-1295° C. for 15-30 seconds in argon and oxygen, having oxygen of 0.5-2.0 vol %. The coated substrate wafer is then cooled at or below 800° C., with 100 vol % argon. A second RTA treatment is performed on the coated substrate wafer at a 1280-1300° C. for 20-35 seconds in argon. An oxide layer is removed from a front side of the coated substrate wafer. The front side of the coated substrate wafer is polished by CMP.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: May 2, 2023
    Assignee: SILTRONIC AG
    Inventors: Timo Mueller, Michael Boy, Michael Gehmlich, Andreas Sattler
  • Publication number: 20220349089
    Abstract: A method produces a single-crystal silicon semiconductor wafer. A single-crystal silicon substrate wafer is double side polished. A front side of the substrate wafer is chemical mechanical polished (CMP). An epitaxial layer of single-crystal silicon is deposited on the front side of the substrate wafer. A first rapid thermal anneal (RTA) treatment is performed on the coated substrate wafer at 1275-1295° C. for 15-30 seconds in argon and oxygen, having oxygen of 0.5-2.0 vol %. The coated substrate wafer is then cooled at or below 800° C., with 100 vol % argon. A second RTA treatment is performed on the coated substrate wafer at a 1280-1300° C. for 20-35 seconds in argon. An oxide layer is removed from a front side of the coated substrate wafer. The front side of the coated substrate wafer is polished by CMP.
    Type: Application
    Filed: July 7, 2022
    Publication date: November 3, 2022
    Inventors: Timo Mueller, Michael Boy, Michael Gehmlich, Andreas Sattler
  • Patent number: 10961640
    Abstract: Semiconductor wafers useful for NAND circuitry and having a front side, a rear side, a middle and a periphery, have an Nv region which extends from the middle to the periphery; a denuded zone which extends from the front side to a depth of not less than 20 ?m into the interior of the semiconductor wafer, where the density of vacancies in the denuded zone, determined by means of platinum diffusion and DLTS is not more than 1×1013 vacancies/cm3; a concentration of oxygen of not less than 4.5×1017 atoms/cm3 and not more than 5.5×1017 atoms/cm3; a region in the interior of the semiconductor wafer which adjoins the denuded zone and has nuclei which can be developed by means of a heat treatment into BMDs having a peak density of not less than 6.0×109/cm3, where the heat treatment comprises heating the semiconductor wafer to a temperature of 800° C. over a period of four hours and to a temperature of 1000° C. over a period of 16 hours. The wafers are produced by a unique RTA treatment of Nv wafers.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: March 30, 2021
    Assignee: SILTRONIC AG
    Inventors: Timo Mueller, Michael Gehmlich, Andreas Sattler
  • Publication number: 20200248333
    Abstract: A semiconductor wafer of single-crystal silicon includes: a polished front side and a back side; a denuded zone, which extends from the polished front side toward the back side to a depth of not less than 45 ?m; and a region adjacent to the denuded zone, the region having bulk micro defect (BMD) seeds, which are capable of being developed into BMDs. A density of the BMDs at a distance of 120 ?m from the front side is not less than 3×109 cm?3.
    Type: Application
    Filed: October 9, 2018
    Publication date: August 6, 2020
    Inventors: Timo Mueller, Michael Boy, Michael Gehmlich, Andreas Sattler
  • Publication number: 20200240039
    Abstract: Semiconductor wafers useful for NAND circuitry and having a front side, a rear side, a middle and a periphery, have an Nv region which extends from the middle to the periphery; a denuded zone which extends from the front side to a depth of not less than 20 ?m into the interior of the semiconductor wafer, where the density of vacancies in the denuded zone, determined by means of platinum diffusion and DLTS is not more than 1×1013 vacancies/cm3; a concentration of oxygen of not less than 4.5×1017 atoms/cm3 and not more than 5.5×1017 atoms/cm3; a region in the interior of the semiconductor wafer which adjoins the denuded zone and has nuclei which can be developed by means of a heat treatment into BMDs having a peak density of not less than 6.0×109/cm3, where the heat treatment comprises heating the semiconductor wafer to a temperature of 800° C. over a period of four hours and to a temperature of 1000° C. over a period of 16 hours. The wafers are produced by a unique RTA treatment of Nv wafers.
    Type: Application
    Filed: December 8, 2017
    Publication date: July 30, 2020
    Applicant: SILTRONIC AG
    Inventors: Timo MUELLER, Michael GEHMLICH, Andreas SATTLER
  • Patent number: 10483128
    Abstract: Epitaxial wafers with a high concentration of BMD nuclei or developed BMDs just below a denuded zone, and having low surface roughness, are produced by forming an oxynitride layer on a purposefully oxidized epitaxial layer by a short RTA treatment in a nitriding atmosphere, removing the oxynitride layer, and then polishing the epitaxial surface.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: November 19, 2019
    Assignee: SILTRONIC AG
    Inventors: Timo Mueller, Michael Gehmlich, Frank Faller
  • Publication number: 20180047586
    Abstract: Epitaxial wafers with a high concentration of BMD nuclei or developed BMDs just below a denuded zone, and having low surface roughness, are produced by forming an oxynitride layer on a purposefully oxidized epitaxial layer by a short RTA treatment in a nitriding atmosphere, removing the oxynitride layer, and then polishing the epitaxial surface.
    Type: Application
    Filed: October 29, 2015
    Publication date: February 15, 2018
    Applicant: Siltronic AG
    Inventors: Timo MUELLER, Michael GEHMLICH, Frank FALLER
  • Patent number: 9230798
    Abstract: Monocrystalline silicon semiconductor wafers have a front side and a rear side, and a denuded zone which extends from the front side to the rear side as far as a depth which between a center and an edge of the semiconductor wafer on average is not less than 8 ?m and not more than 18 ?m, and having a region adjoining the denuded zone having BMDs whose density at a distance of 30 ?m from the front side is not less than 2×109 cm?3. The semiconductor wafers are produced by a method comprising providing a substrate wafer of monocrystalline silicon and an RTA treating the substrate wafer, the treatment subdivided into a first thermal treatment of the substrate wafer in an atmosphere consisting of argon and into a second thermal treatment of the substrate wafer in an atmosphere consisting of argon and ammonia.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: January 5, 2016
    Assignee: SILTRONIC AG
    Inventors: Timo Mueller, Michael Gehmlich, Frank Faller, Dirk Waehlisch
  • Publication number: 20150325433
    Abstract: Monocrystalline silicon semiconductor wafers have a front side and a rear side, and a denuded zone which extends from the front side to the rear side as far as a depth which between a center and an edge of the semiconductor wafer on average is not less than 8 ?m and not more than 18 ?m, and having a region adjoining the denuded zone having BMDs whose density at a distance of 30 ?m from the front side is not less than 2×109 cm?3. The semiconductor wafers are produced by a method comprising providing a substrate wafer of monocrystalline silicon and an RTA treating the substrate wafer, the treatment subdivided into a first thermal treatment of the substrate wafer in an atmosphere consisting of argon and into a second thermal treatment of the substrate wafer in an atmosphere consisting of argon and ammonia.
    Type: Application
    Filed: May 5, 2015
    Publication date: November 12, 2015
    Inventors: Timo MUELLER, Michael GEHMLICH, Frank FALLER, Dirk WAEHLISCH