Abstract: A method for joining studs to workpieces, in particular for the purpose of stud welding, comprising the steps of acquiring a distinguishing dimension of a stud to be joined by the application of a sensing element to the stud and through measurement of a travel distance of the sensing element as it is applied to the stud; and then joining the stud to a workpiece, if the dimension of the stud is within an allowable tolerance range, and the allowable tolerance range is adapted in dependence on the travel distance of the sensing element measured during a preceding method step.

Abstract: A method for joining studs to workpieces, in particular for the purpose of stud welding, comprising the steps of acquiring a distinguishing dimension of a stud to be joined by the application of a sensing element to the stud and through measurement of a travel distance of the sensing element as it is applied to the stud; and then joining the stud to a workpiece, if the dimension of the stud is within an allowable tolerance range, and the allowable tolerance range is adapted in dependence on the travel distance of the sensing element measured during a preceding method step.

Abstract: A method for automatic operating voltage detection, in which one internal supply voltage (vdd) is selected from at least two different external supply voltages, with a first external voltage supply (VDDA) being applied permanently, is based on the object of reducing the circuit complexity for automatic operating voltage detection, the operating current caused by the selection arrangement and the required chip area, in which case the voltage ratios between the two different external supply voltages can be as required. This object is achieved in that a reference voltage (Vref) and a voltage (VDDreg) is produced from the first external supply voltage (VDDA), the reference voltage (Vref) is compared with a second external supply voltage (VDDIO), and either the voltage (VDDreg) produced from the first external supply voltage (VDDA) or the second external supply voltage (VDDIO) is released as an internal supply voltage (vdd), depending on the comparison.

Abstract: A method and a system for reducing a dynamic offset during the processing of asymmetric signal strings includes reducing a dynamic offset which allows a reduction of any disturbing influence on subsequent process steps. In every no-pulse period a capacitor is discharged by an amount depending on the value of the amplitude of the voltage of the high-pass structure on the input side.

Abstract: In a method and arrangement for forming reception pulses, output signals of an upstream comparator which recognizes light pulses are used to evaluate a downstream arrangement and are newly formed and emitted as pulses. The aim is to produce a method and an associated circuit arrangement for forming reception pulses which represent a saving in energy, whereby said arrangement can be integrated into existing receiver systems, requires no external time base and can work with the signal of an upstream comparator. In a first step, an input signal delivered by an upstream comparator is delayed, whereupon a time reference is produced in a controlled manner and an output pulse begins to be formed in a controlled manner by means of the delayed input signal from the first step. The input signal level is examined once production of the time reference is completed.

Abstract: An arrangement is provided for carrying out current-to-voltage conversion, preferably for an infrared receiver, in which the static offset, which has an interfering effect with regard to sensitivity or malfunctions, is reduced during the carrying out of current-to-voltage conversion of received input pulses. In this arrangement, outputs of a second stage are fed back to inputs of a first stage of the multistage transimpedance stage.

Abstract: A method for automatic operating voltage detection, in which one internal supply voltage (vdd) is selected from at least two different external supply voltages, with a first external voltage supply (VDDA) being applied permanently, is based on the object of reducing the circuit complexity for automatic operating voltage detection, the operating current caused by the selection arrangement and the required chip area, in which case the voltage ratios between the two different external supply voltages can be as required. This object is achieved in that a reference voltage (Vref) and a voltage (VDDreg) is produced from the first external supply voltage (VDDA), the reference voltage (Vref) is compared with a second external supply voltage (VDDIO), and either the voltage (VDDreg) produced from the first external supply voltage (VDDA) or the second external supply voltage (VVDIO) is released as an internal supply voltage (vdd), depending on the comparison.

Abstract: The invention relates to a method and a system for reducing a dynamic offset during the processing of asymmetric signal strings. The aim of the invention is to provide a method and a system for reducing a dynamic offset which allows to reduce any disturbing influence on subsequent process steps. According to the invention, this aim is achieved by a discharge of the capacity in every no-pulse period by a value depending on the value of the amplitude of the voltage of the high-pass structure on the input side.

Abstract: The aim of the invention, which concerns a method and a system for converting an optical received pulse train into an electrical output pulse train, is to create a method and an associated circuit arrangement for converting an optical received pulse train into an electrical output pulse train whereby achieving an improvement in transmission quality and a reduction in latency time.

Abstract: An arrangement for carrying out current-to-voltage conversion, preferably for an infrared receiver, in which the static offset, which has an interfering effect with regard to sensitivity or malfunctions, is reduced during the carrying out of current-to-voltage conversion of received input pulses. In this arrangement, outputs of a second stage are fed back to inputs of a first stage of the multistage transimpedance stage.

Abstract: In a method and arrangement for forming reception pulses, output signals of an upstream comparator which recognizes light pulses are used to evaluate a downstream arrangement and are newly formed and emitted as pulses. The aim is to produce a method and an associated circuit arrangement for forming reception pulses which represent a saving in energy, whereby said arrangement can be integrated into existing receiver systems, requires no external time base and can work with the signal of an upstream comparator. In a first step, an input signal delivered by an upstream comparator is delayed, whereupon a time reference is produced in a controlled manner and an output pulse begins to be formed in a controlled manner by means of the delayed input signal from the first step. The input signal level is examined once production of the time reference is completed.

Abstract: The aim of the invention, which concerns a method and a system for converting an optical received pulse train into an electrical output pulse train, is to create a method and an associated circuit arrangement for converting an optical received pulse train into an electrical output pulse train whereby achieving an improvement in transmission quality and a reduction in latency time.