Patents by Inventor Michael Gill

Michael Gill has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260152722
    Abstract: The invention relates to a modified animal cell and a method of producing the modified animal cell having a genetic modification in one or more genes associated with genome surveillance, cell cycle control and/or cell death control. The animal cell is selected from an animal species suitable for human or animal consumption. The animal cell generally has a genetic modification in the RB1, TP53 or RAS genes.
    Type: Application
    Filed: September 29, 2023
    Publication date: June 4, 2026
    Inventors: Florian HAHN, Rowan RIMINGTON, James SHELFORD, Caitlin DORAN, Lucy WILKINSON, Alasdair RUSSELL, Michael GILL, Amy SMITH
  • Patent number: 12622906
    Abstract: The invention provides a CCR1 antagonist, or a pharmaceutically acceptable salt, hydrate or solvate thereof, for use in the treatment of pancreatic cancer, in particular a CCR1 antagonist, for example in combination with one or more further therapeutic agents effective as anti-tumour agents in the treatment of pancreatic cancer. Such an anti-tumour agent may be a chemotherapeutic agent selected from Gemcitabine, Fluorouracil (5-FU), Capecitabine, FOLFIRINOX (Leucovorin Calcium, Fluorouracil, Irinotecan Hydrochloride and Oxaliplatin), Nab-paclitaxel (Abraxane®) and combinations thereof. An immuno-oncology agent (e.g. a PD-1 inhibitor and/or a PD-L1 inhibitor) may also favourably be used with the CCR1 antagonist.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: May 12, 2026
    Assignee: Cambridge Enterprise Limited
    Inventors: Tony James Wu, Michael Gill, Martin Miller, Oliver Cast
  • Patent number: 12073155
    Abstract: Automatically generating a hardware image based on programming model types includes determining by a design tool, types of programming models used in specifications of blocks of a circuit design, in response to a user control input to generate a hardware image to configure a programmable integrated circuit (IC). The design tool can generate a model-type compiler script for each of the types of programming models. Each compiler script initiates compilation of blocks having specifications based on one of the types of programming model into an accelerator representation. The design tool can generate a build script configured to execute the compiler scripts and link the accelerator representations into linked accelerator representations. Execution of the build script builds a hardware image from the linked accelerator representations for configuring the programmable IC to implement a circuit according to the circuit design.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: August 27, 2024
    Assignee: XILINX, INC.
    Inventors: Anindita Patra, Ali Behboodian, Michael Gill
  • Publication number: 20230289500
    Abstract: Automatically generating a hardware image based on programming model types includes determining by a design tool, types of programming models used in specifications of blocks of a circuit design, in response to a user control input to generate a hardware image to configure a programmable integrated circuit (IC). The design tool can generate a model-type compiler script for each of the types of programming models. Each compiler script initiates compilation of blocks having specifications based on one of the types of programming model into an accelerator representation. The design tool can generate a build script configured to execute the compiler scripts and link the accelerator representations into linked accelerator representations. Execution of the build script builds a hardware image from the linked accelerator representations for configuring the programmable IC to implement a circuit according to the circuit design.
    Type: Application
    Filed: March 11, 2022
    Publication date: September 14, 2023
    Applicant: Xilinx, Inc.
    Inventors: Anindita Patra, Ali Behboodian, Michael Gill
  • Publication number: 20230064214
    Abstract: The invention provides a CCR1 antagonist, or a pharmaceutically acceptable salt, hydrate or solvate thereof, for use in the treatment of pancreatic cancer, in particular a CCR1 antagonist, for example in combination with one or more further therapeutic agents effective as anti-tumour agents in the treatment of pancreatic cancer. Such an anti-tumour agent may be a chemotherapeutic agent selected from Gemcitabine, Fluorouracil (5-FU), Capecitabine, FOLFIRINOX (Leucovorin Calcium, Fluorouracil, Irinotecan Hydrochloride and Oxaliplatin), Nab-paclitaxel (Abraxane®) and combinations thereof. An immuno-oncology agent (e.g. a PD-1 inhibitor and/or a PD-L1 inhibitor) may also favourably be used with the CCR1 antagonist.
    Type: Application
    Filed: December 18, 2020
    Publication date: March 2, 2023
    Applicant: Cambridge Enterprise Limited
    Inventors: Tony James Wu, Michael Gill, Martin Miller, Oliver Cast
  • Publication number: 20210336457
    Abstract: Systems are presented for modular, scalable storing and delivery of electrical power. Exemplary implementations may include: at least one energy storage device such as a plurality of battery cells or a flywheel energy storage device; an interconnection port configured for connecting the system to one or more other similar systems; one or more charging ports configured collectively to receive electrical power delivered at more than one voltage; and one or more discharge ports configured collectively to discharge electrical power at more than one voltage. In some embodiments, one or more of a solar power generation source, a wind generation source, and a hydroelectric generator may be electrically coupled to the system for supplying energy for charging.
    Type: Application
    Filed: April 27, 2021
    Publication date: October 28, 2021
    Inventors: Ryan Duarte, Michael Gill
  • Patent number: 10977018
    Abstract: Implementing an application within a heterogeneous device can include receiving an application specifying a plurality of hardware accelerators and having a plurality of sections corresponding to different subsystems of the heterogeneous device, wherein the plurality of sections are specified using different programming models. Compiling each section based on the programming model of the section and the subsystem of the heterogeneous device corresponding to the section into an accelerator representation. Linking the accelerator representations based on a platform of the heterogeneous device, generating a hardware implementation of the application for the heterogeneous device based on the linked accelerator implementations, and automatically generating program code configured to control one or more of the plurality of hardware accelerators of the hardware implementation.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: April 13, 2021
    Assignee: Xilinx, Inc.
    Inventors: L. James Hwang, Michael Gill, Tom Shui, Jorge E. Carrillo, Alfred Huang, Sudipto Chakraborty
  • Patent number: 10762265
    Abstract: Using a high-level language (HLL) callable library for multiple instances of a core includes detecting, using computer hardware, a reference to an HLL library for a core within an HLL application, determining, using the computer hardware, a plurality of instances of the core by detecting function calls within the HLL application correlated to each of the plurality of instances of the core, and generating, using the computer hardware, interface code within the HLL application for each of the plurality of instances of the core using the HLL library. An executable version of the HLL application is generated, using the computer hardware, wherein the interface code for each of the plurality of instances of the core is bound to the respective instance of the core. The function calls can specify different parameterization files corresponding to the plurality of instances of the core.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: September 1, 2020
    Assignee: Xilinx, Inc.
    Inventors: Zhenman Fang, James L. Hwang, Alfred Huang, Michael Gill, Tom Shui
  • Patent number: 10755013
    Abstract: Creating a high-level language (HLL) callable library for a hardware core can include automatically querying, using computer hardware, a metadata description of a core to determine a plurality of available ports of the core, automatically determining, using the computer hardware, an argument of a first function specified in a header file corresponding to the core, mapping, using the computer hardware, the argument to a first port of the plurality of available ports, and automatically generating and storing, using the computer hardware, an HLL library specifying a mapping of the argument to the first port of the core. The HLL library is configured for inclusion with a user application during compilation.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: August 25, 2020
    Assignee: Xilinx, Inc.
    Inventors: Zhenman Fang, James L. Hwang, Samuel A. Skalicky, Tom Shui, Michael Gill, Welson Sun, Alfred Huang, Jorge E. Carrillo, Chen Pan
  • Publication number: 20190129377
    Abstract: Systems and methods are provided for utilizing re-usable and re-configurable reporter modules in welding-type setups. A hardware-based reporting module may be used to handle reporting function. The hardware-based reporting module being configured to interface with a welding-type setup, to obtain welding-type data associated with the welding-type setup; and to interface with a remote central repository for communicating the obtained welding-type data, based on a predefined reporting format. The hardware-based reporting module is configured to process the welding-type data for communication to the remote central repository.
    Type: Application
    Filed: November 2, 2017
    Publication date: May 2, 2019
    Inventors: Michael Gill, Praveen Dandu, Todd Holverson, Adam Kirk Pliska
  • Patent number: 9798344
    Abstract: This invention is an electronic circuit with a low power retention mode. A single integrated circuit includes a circuit module and a droop switch circuit supplied by a voltage regulator. In a normal mode a PMOS source-drain channel connects the voltage regulator power to the circuit module power input or isolates them dependent upon a power switch input. In a low power mode a second PMOS connected between the first PMOS gate and output diode connects the first PMOS. This supplied the circuit module from the voltage regulator power as reduced in voltage by a diode forward bias drop. This lower voltage should be sufficient for flip-flops in the circuit module to retain their state while not guaranteeing logic operation. There may be a plurality of chain connected droop switch each powering a corresponding circuit module.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: October 24, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ramakrishnan Venkatasubramanian, Shane Stelmach, Soman Purushotaman, Michael Gill, Jose Luis Flores
  • Patent number: 9618956
    Abstract: A power supply for an electronic circuit enables a low effort retention mode. During a normal mode a circuit module is supplied a first voltage sufficient for a controlled circuit to operate. During the low effort retention mode the circuit module is supplied with a second voltage lower than the first voltage. The second voltage is sufficient for flop-flops to retain their state but not sufficient to guarantee proper circuit operation. The second voltage is produced by a voltage drop (droop) from the first voltage. The preferred embodiment includes a System On Chip and one external voltage regulator and an on-chip droop circuit for each circuit module.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: April 11, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael Gill, Ramakrishnan Venkatasubramanian, Shane Stelmach, Jose Luis Flores
  • Publication number: 20160357211
    Abstract: This invention is an electronic circuit with a low power retention mode. A single integrated circuit includes a circuit module and a droop switch circuit supplied by a voltage regulator. In a normal mode a PMOS source-drain channel connects the voltage regulator power to the circuit module power input or isolates them dependent upon a power switch input. In a low power mode a second PMOS connected between the first PMOS gate and output diode connects the first PMOS. This supplied the circuit module from the voltage regulator power as reduced in voltage by a diode forward bias drop. This lower voltage should be sufficient for flip-flops in the circuit module to retain their state while not guaranteeing logic operation. There may be a plurality of chain connected droop switch each powering a corresponding circuit module.
    Type: Application
    Filed: August 15, 2016
    Publication date: December 8, 2016
    Inventors: Ramakrishnan Venkatasubramanian, Shane Stelmach, Soman Purushotaman, Michael Gill, Jose Luis Flores
  • Publication number: 20160357210
    Abstract: A power supply for an electronic circuit enables a low effort retention mode. During a normal mode a circuit module is supplied a first voltage sufficient for a controlled circuit to operate. During the low effort retention mode the circuit module is supplied with a second voltage lower than the first voltage. The second voltage is sufficient for flop-flops to retain their state but not sufficient to guarantee proper circuit operation. The second voltage is produced by a voltage drop (droop) from the first voltage. The preferred embodiment includes a System On Chip and one external voltage regulator and an on-chip droop circuit for each circuit module.
    Type: Application
    Filed: June 8, 2015
    Publication date: December 8, 2016
    Inventors: Michael Gill, Ramakrishnan Venkatasubramanian, Shane Stelmach, Jose Luis Flores
  • Patent number: 9417648
    Abstract: This invention is an electronic circuit with a low power retention mode. A single integrated circuit includes a circuit module and a droop switch circuit supplied by a voltage regulator. In a normal mode a PMOS source-drain channel connects the voltage regulator power to the circuit module power input or isolates them dependent upon a power switch input. In a low power mode a second PMOS connected between the first PMOS gate and output diode connects the first PMOS. This supplied the circuit module from the voltage regulator power as reduced in voltage by a diode forward bias drop. This lower voltage should be sufficient for flip-flops in the circuit module to retain their state while not guaranteeing logic operation. There may be a plurality of chain connected droop switch each powering a corresponding circuit module.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: August 16, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ramakrishnan Venkatasubramanian, Shane Stelmach, Soman Purushotaman, Michael Gill, Jose Luis Flores
  • Publication number: 20140360788
    Abstract: In order to provide a nonmagnetic material for producing parts or coatings adapted for highly wear and corrosion intensive applications, said material comprising preformed particles made of tungsten carbide which are embedded in a metal phase made of a Ni-based alloy. It is suggested that the weight portion of said tungsten carbide particles is in the range between 30 wt. % and 65 wt. % and wherein the Ni-based alloy is a Nickel-Chromium-Molybdenum alloy comprising: (in wt. %): Cr 11.0,-30.0? Mo 5.0-25.0? Fe ?0-10.0 B 0-5.0 Co 0-2.
    Type: Application
    Filed: June 10, 2013
    Publication date: December 11, 2014
    Inventors: MICHEL JUNOD, Michael Gill, Alain Tremblay
  • Publication number: 20140239629
    Abstract: A mending apparatus or kink mender (100) is utilized to un-kink a soft wall hose section (102), without cutting or splicing the hose. The apparatus (100) is preferably a molded part that encompasses the hose section (102) around the exterior wall (110) by clamping around the outer surface of the hose section (102). This action causes the outside of the hose section (102) to again reform into a true cylinder, which in turn will remove a kink from a kink area (114) and open the interior (104) of the hose (102) so as to allow fluid to again flow through the hose section (102).
    Type: Application
    Filed: February 22, 2013
    Publication date: August 28, 2014
    Inventor: Michael Gill
  • Patent number: 8460604
    Abstract: In order to provide a nonmagnetic material for producing parts or coatings adapted for highly wear and corrosion intensive applications, said material comprising preformed particles made of tungsten carbide which are embedded in a metal phase made of a Ni-based alloy. It is suggested that the weight portion of said tungsten carbide particles is in the range between 30 wt. % and 65 wt. % and wherein the Ni-based alloy is a Nickel-Chromium-Molybdenum alloy comprising: (in wt. %): Cr 11.0.-30.0? Mo 5.0-25.0? Fe ?0-10.0 B 0-5.0 Co ?0-2.5.
    Type: Grant
    Filed: May 16, 2007
    Date of Patent: June 11, 2013
    Assignee: Mec Holding GmbH
    Inventors: Michel Junod, Michael Gill, Alain Tremblay
  • Publication number: 20100009089
    Abstract: In order to provide a nonmagnetic material for producing parts or coatings adapted for highly wear and corrosion intensive applications, said material comprising preformed particles made of tungsten carbide which are embedded in a metal phase made of a Ni-based alloy. It is suggested that the weight portion of said tungsten carbide particles is in the range between 30 wt. % and 65 wt. % and wherein the Ni-based alloy is a Nickel-Chromium-Molybdenum alloy comprising: (in wt. %): Cr 11.0.-30.0? Mo 5.0-25.0? Fe ?0-10.0 B 0-5.0 Co 0-2.
    Type: Application
    Filed: May 16, 2007
    Publication date: January 14, 2010
    Inventors: Michel Junod, Michael Gill, Alain Tremblay
  • Patent number: RE45355
    Abstract: A door hanger (140) is disclosed for use in installation of a door assembly (100). The door hanger (140) includes a jamb arm (142) with a triangular shaped edge (144), and proximate shorter edges (145) formed inwardly from the triangular shaped edge (144) and perpendicular to each other. A pair of opposing faces (143) are formed by the triangular shaped edge (144) and the proximate edges (145), and a central hole (146) is located substantially in the center of the opposing faces (143). An alignment flange (150) is perpendicular to the jamb arm (142) and includes a distal arcuate edge (152). The arcuate edge (152) has a configuration substantially conforming to the legs of a triangle. Formed inwardly from the distal arcuate edge (152) are a pair of opposing sides (154), with sets of alignment notches (156) formed on the opposing sides (154).
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: February 3, 2015
    Inventors: Nathan K. Root, Dennis Gill, Michael Gill