Patents by Inventor Michael Glavanovics

Michael Glavanovics has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11799467
    Abstract: A device is provided that includes a power transistor and an overcurrent detection logic. The overcurrent detection logic has a first stable state providing a first signal level on a status output terminal and a second stable state providing a second signal level on the status output terminal. The overcurrent detection logic changes from the first stable state to the second stable state in response to detecting that a current through the power transistor exceeds a current limit. The overcurrent detection logic remains in the second state when the current through the transistor drops below the limit after exceeding the current limit.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: October 24, 2023
    Assignee: Infineon Technologies AG
    Inventors: Markus Sievers, Michael Glavanovics, Dethard Peters
  • Publication number: 20220224323
    Abstract: A device is provided that includes a power transistor and an overcurrent detection logic. The overcurrent detection logic has a first stable state providing a first signal level on a status output terminal and a second stable state providing a second signal level on the status output terminal. The overcurrent detection logic changes from the first stable state to the second stable state in response to detecting that a current through the power transistor exceeds a current limit. The overcurrent detection logic remains in the second state when the current through the transistor drops below the limit after exceeding the current limit.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 14, 2022
    Inventors: Markus Sievers, Michael Glavanovics, Dethard Peters
  • Patent number: 6948847
    Abstract: A temperature sensor for a MOS circuit configuration is implemented as the gate of a MOS transistor and configured as a two-terminal network with a gate input and a gate output. By measuring the voltage drop across gate it is possible to determine the temperature at its location.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: September 27, 2005
    Assignee: Infineon Technologies AG
    Inventors: Eric Pihet, Michael Glavanovics, Thomas Krotscheck, Rudolf Zelsacher
  • Publication number: 20030210507
    Abstract: A temperature sensor for a MOS circuit configuration is implemented as the gate of a MOS transistor and configured as a two-terminal network with a gate input and a gate output. By measuring the voltage drop across gate it is possible to determine the temperature at its location.
    Type: Application
    Filed: May 8, 2003
    Publication date: November 13, 2003
    Inventors: Eric Pihet, Michael Glavanovics, Thomas Krotscheck, Rudolf Zelsacher