Abstract: In a method of communicating data via a bus between several modules connected to the bus in accordance with the source synchronous clock principle the data is applied from the modules to a data bus as controlled by the system clock signal A source clock signal generated by each of the modules is communicated spaced in time from the data on a source clock line. The time spacing between the data applied by a module to the data bus and the source clock signal generated by this module and applied to the source clock line can be varied as a function of characteristic parameters of the modules connected to the bus with the aid of an adjustable delay member.

Abstract: In a method of communicating data via a bus between several modules connected to the bus in accordance with the source synchronous clock principle the data is applied from the modules to a data bus as controlled by the system clock signal A source clock signal generated by each of the modules is communicated spaced in time from the data on a source clock line. The time spacing between the data applied by a module to the data bus and the source clock signal generated by this module and applied to the source clock line can be varied as a function of characteristic parameters of the modules connected to the bus with the aid of an adjustable delay member.