Abstract: A method and system provide for multi-surface patterning. An input target multi-surface consisting of multiple target surfaces is obtained. A first guide curve is obtained. A pattern is obtained. One or more section planes are created based on the pattern and the first guide curve. The one or more section planes are intersected with each of the multiple target surfaces resulting in an intersection curve for each of the multiple target surfaces. A single continuous curve is created from the intersecting curves. Points are generated based on the continuous curve, the first guide curve, and the pattern. An object is generated and placed based on the points.

Abstract: A method for controlling a charging apparatus of a vehicle, in particular an electric or hybrid vehicle, wherein the charging apparatus has a charging device including a protection and monitoring device. The vehicle includes a high-voltage on-board power system and an electrical energy storage apparatus connected to the high-voltage on-board power system. The method includes electrically connecting the high-voltage on-board power system to charging connections of an energy supply system by the charging apparatus. The charging connections include a neutral conductor, a protective conductor and at least one phase conductor. A protective conductor resistance is detected between the neutral conductor and the protective conductor by feeding in a test current by the protection and monitoring device. A frequency of the test current is filtered out of the compensation frequency range on a narrowband basis.

Abstract: A method for controlling a charging apparatus of a vehicle, in particular an electric or hybrid vehicle, wherein the charging apparatus has a charging device including a protection and monitoring device. The vehicle includes a high-voltage on-board power system and an electrical energy storage apparatus connected to the high-voltage on-board power system. The method includes electrically connecting the high-voltage on-board power system to charging connections of an energy supply system by the charging apparatus. The charging connections include a neutral conductor, a protective conductor and at least one phase conductor. A protective conductor resistance is detected between the neutral conductor and the protective conductor by feeding in a test current by the protection and monitoring device. A frequency of the test current is filtered out of the compensation frequency range on a narrowband basis.

Abstract: A method for producing a sinter layer connection between a substrate and a chip resulting in an electric and thermal connection therebetween and in reduced mechanical tensions within the chip. The method produces a sinter layer by applying a multitude of sinter elements of a base material forming the sinter layer in structured manner on a contact area of a main surface of a substrate; placing a chip to be joined to the substrate on the sinter elements; and heating and compressing the sinter elements to produce a structured sinter layer connecting the substrate and chip and extending within the contact area, the surface coverage density of the sinter elements on the substrate in a center region of the contact area being greater than the surface coverage density of the sinter elements in an edge region of the contact area, and at least one through channel, extending laterally as to the substrate's main surface being provided towards the contact area's edge.

Abstract: A commutation cell having at least one electrical capacitor, at least one controllable semiconductor switch and at least one semiconductor which is connected in series with the controllable semiconductor switch. The commutation cell has three circuit substrates situated in parallel with one another. The controllable semiconductor switch is connected in series with the semiconductor via a circuit substrate situated partially between the controllable semiconductor switch and the semiconductor, and the two remaining circuit substrates being connected to one another in an electrically conductive manner via a subassembly made up of the controllable semiconductor switch, the semiconductor and the circuit substrate situated partially between the controllable semiconductor switch and the semiconductor, the electrical capacitor being switched between the two remaining circuit substrates, separately from the subassembly.

Abstract: Laminated composite (10) comprising at least one electronic substrate (11) and an arrangement of layers (20, 30) made up of at least a first layer (20) of a first metal and/or a first metal alloy and of a second layer (30) of a second metal and/or a second metal alloy adjacent to this first layer (20), wherein the melting temperatures of the first and second layers are different, and wherein, after a thermal treatment of the arrangement of layers (20, 30), a region with at least one intermetallic phase (40) is formed between the first layer and the second layer, wherein the first layer (20) or the second layer (30) is formed by a reaction solder which consists of a mixture of a basic solder with an AgX, CuX or NiX alloy, wherein the component X of the AgX, CuX or NiX alloy is selected from the group consisting of B, Mg, Al, Si, Ca, Se, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Ag, In, Sn, Sb, Ba, Hf, Ta, W, Au, Bi, La, Ce, Pr, Nd, Gd, Dy, Sm, Er, Tb, Eu, Ho, Tm, Yb and Lu and wherein the melti

Abstract: A commutation cell having at least one electrical capacitor, at least one controllable semiconductor switch and at least one semiconductor which is connected in series with the controllable semiconductor switch. The commutation cell has three circuit substrates situated in parallel with one another. The controllable semiconductor switch is connected in series with the semiconductor via a circuit substrate situated partially between the controllable semiconductor switch and the semiconductor, and the two remaining circuit substrates being connected to one another in an electrically conductive manner via a subassembly made up of the controllable semiconductor switch, the semiconductor and the circuit substrate situated partially between the controllable semiconductor switch and the semiconductor, the electrical capacitor being switched between the two remaining circuit substrates, separately from the subassembly.

Abstract: An optoelectronic component contains a semiconductor chip (1) and a carrier body (10), which are provided with a transparent, electrically insulating encapsulation layer (3), the encapsulation layer (3) having two cutouts (11, 12) for uncovering a contact area (6) and a connection region (8) of the carrier body, and an electrically conductive layer (14) being led from the contact area (6) over a partial region of the encapsulation layer (3) to the electrical connection region (8) of the carrier body (10) in order to electrically connect the contact area (6) and the electrical connection region (8) to one another. The radiation emitted in a main radiation direction (13) by the semiconductor chip (1) is coupled out through the encapsulation layer (3), which advantageously contains luminescence conversion substances for the wavelength conversion of the emitted radiation.

Abstract: An electrically conductive contact layer (4) is provided with a joining material (9) during a method for producing a piezoelectric component (1), in particular a piezoelectric sensor (1). To this end, the electrically conductive contact layer (4) can be dipped into a paste that serves to form the joining material (9). The contact layer (4) provided with the joining material (9) is subsequently disposed between a first piezoceramic layer (2) and a second piezoceramic layer (3). The contact layer (4) is then inserted via the joining material (9) between the first piezoceramic layer (2) and the second piezoceramic layer (3), wherein a pressure is applied to the first piezocermaic layer (2) against the second piezoceramic layer (3).

Abstract: The invention relates to a method for connecting at least two components (18, 20) using a sintering process. The aim of the invention is to improve the sintering process.

Abstract: The invention relates to a method for joining a semiconductor (20) to a substrate (10), comprising the following steps: •applying a first paste layer (1) of a sintering paste to the substrate; •heating and compressing the first paste layer to form a first sintered layer; •applying a second paste layer (2) of a sintering paste to the first sintered layer and arranging a semiconductor (20) on the second paste layer; •heating and compressing the second paste layer (2) to form a second sintered layer. The invention further relates to a semiconductor component produced by means of the method.

Abstract: In a method for producing a radiation-emitting optoelectronic component, a semiconductor chip is mounted by a first main area onto a carrier body and is electrically conductively connected at a first contact area to a first connection region, and a transparent electrically insulating encapsulation layer is applied to the chip and the carrier body. A first cutout in the encapsulation layer for at least partly uncovering a second contact area of the chip is produced, and a second cutout in the encapsulation layer for at least partly uncovering a second connection region of the carrier body is produced. Finally, an electrically conductive layer, which electrically conductively connects the second contact area of the semiconductor chip and the second connection region of the carrier body, is applied.

Abstract: Laminated composite (10) comprising at least one electronic substrate (11) and an arrangement of layers (20, 30) made up of at least a first layer (20) of a first metal and/or a first metal alloy and of a second layer (30) of a second metal and/or a second metal alloy adjacent to this first layer (20), wherein the melting temperatures of the first and second layers are different, and wherein, after a thermal treatment of the arrangement of layers (20, 30), a region with at least one intermetallic phase (40) is formed between the first layer and the second layer, wherein the first layer (20) or the second layer (30) is formed by a reaction solder which consists of a mixture of a basic solder with an AgX, CuX or NiX alloy, wherein the component X of the AgX, CuX or NiX alloy is selected from the group consisting of B, Mg, Al, Si, Ca, Se, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ga, Ge, Y, Zr, Nb, Mo, Ag, In, Sn, Sb, Ba, Hf, Ta, W, Au, Bi, La, Ce, Pr, Nd, Gd, Dy, Sm, Er, Tb, Eu, Ho, Tm, Yb and Lu and wherein the melti

Abstract: The invention relates to a layered composite (10), in particular for connecting electronic components as joining partners, comprising at least one substrate film (11) and a layer assembly (12) applied to the substrate film. The layer assembly comprises at least one sinterable layer (13), which is applied to the substrate film (11) and which contains at least one metal powder, and a solder layer (14) applied to the sinterable layer (13). The invention further relates to a method for forming a layered composite, to a circuit assembly containing a layered composite (10) according to the invention, and to the use of a layered composite (10) in a joining method for electronic components.

Abstract: A method for producing a sinter layer connection between a substrate and a chip resulting in an electric and thermal connection therebetween and in reduced mechanical tensions within the chip. The method produces a sinter layer by applying a multitude of sinter elements of a base material forming the sinter layer in structured manner on a contact area of a main surface of a substrate; placing a chip to be joined to the substrate on the sinter elements; and heating and compressing the sinter elements to produce a structured sinter layer connecting the substrate and chip and extending within the contact area, the surface coverage density of the sinter elements on the substrate in a center region of the contact area being greater than the surface coverage density of the sinter elements in an edge region of the contact area, and at least one through channel, extending laterally as to the substrate's main surface being provided towards the contact area's edge.

Abstract: An electrically conductive contact layer (4) is provided with a joining material (9) during a method for producing a piezoelectric component (1), in particular a piezoelectric sensor (1). To this end, the electrically conductive contact layer (4) can be dipped into a paste that serves to form the joining material (9). The contact layer (4) provided with the joining material (9) is subsequently disposed between a first piezoceramic layer (2) and a second piezoceramic layer (3). The contact layer (4) is then inserted via the joining material (9) between the first piezoceramic layer (2) and the second piezoceramic layer (3), wherein a pressure is applied to the first piezocermaic layer (2) against the second piezoceramic layer (3).

Abstract: A composite component includes a first joining partner, at least one second joining partner and a first joining layer situated between the first joining partner and the second joining partner. In addition to the first joining layer, at least one second joining layer is provided between the first and the second joining partner; and at least one intermediate layer is situated between the first and the second joining layer.

Abstract: In a luminescence diode chip having a radiation exit area (1) and a contact structure (2, 3, 4) which is arranged on the radiation exit area (1) and comprises a bonding pad (4) and a plurality of contact webs (2, 3) which are provided for current expansion and are electrically conductively connected to the bonding pad (4), the bonding pad (4) is arranged in an edge region of the radiation exit area (1). The luminescence diode chip has reduced absorption of the emitted radiation (23) in the contact structure (2, 3, 4).

Abstract: A multicolour LED, in which layers for generating light of different colors are arranged one above the other, is used as the light source in a projector.

Abstract: In a method for producing a radiation-emitting optoelectronic component, a semiconductor chip is mounted by a first main area onto a carrier body and is electrically conductively connected at a first contact area to a first connection region, and a transparent electrically insulating encapsulation layer is applied to the chip and the carrier body. A first cutout in the encapsulation layer for at least partly uncovering a second contact area of the chip is produced, and a second cutout in the encapsulation layer for at least partly uncovering a second connection region of the carrier body is produced. Finally, an electrically conductive layer, which electrically conductively connects the second contact area of the semiconductor chip and the second connection region of the carrier body, is applied.