Abstract: A system for hardware error-correcting code (ECC) detection or correction of a received codeword from an original codeword includes an error-detecting circuit configured to process a selection of symbols of the received codeword using a set of factors, the original codeword being recomputable from a corresponding said selection of symbols of the original codeword using the set of factors. The error-detecting circuit includes a hardware multiplier and accumulator configured to use the set of factors and the selection of symbols of the received codeword to recompute remaining symbols of the original codeword, and a hardware comparator configured to compare the recomputed remaining symbols of the original codeword with corresponding said remaining symbols of the received codeword and to output first results of this comparison.

Abstract: A system for software error-correcting code (ECC) protection or compression of original data using ECC data in a first memory is provided. The system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The software ECC protection or compression includes: a data matrix for holding the original data in the first memory; a check matrix for holding the ECC data in the first memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the ECC data; and a thread for executing on the processing core. The thread includes a Galois Field multiplier for multiplying entries of the data matrix by an entry of the encoding matrix, and a sequencer for ordering operations using the Galois Field multiplier to generate the ECC data.

Abstract: An accelerated erasure coding system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The processing core, storage medium, and computer instructions are configured to implement an erasure coding system, which includes: a data matrix for holding original data in the main memory; a check matrix for holding check data in the main memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the check data; and a thread for executing on the processing core. The thread includes: a parallel multiplier for concurrently multiplying multiple entries of the data matrix by a single entry of the encoding matrix; and a first sequencer for ordering operations through the data matrix and the encoding matrix using the parallel multiplier to generate the check data.

Abstract: A substantially planar waveguide for dynamically controlling the out-of-plane angle at which a light beam exits the waveguide. Generally, liquid crystal materials may be disposed within a waveguide in a cladding proximate or adjacent to a core layer of the waveguide. In one example, the waveguide may contain one or more taper regions such that the light beam exits the waveguide and propagates out-of-the-plane of the waveguide into an out-coupling medium at a propagation angle. In one example, the waveguide may contain one or more electrodes onto which one or more voltages may be applied. The magnitude of the propagation angle may be electronically controlled by altered by controlling or altering the magnitude of the one or more applied voltages.

Abstract: A substantially planar waveguide for dynamically controlling the out-of-plane angle at which a light beam exits the waveguide. Generally, liquid crystal materials may be disposed within a waveguide in a cladding proximate or adjacent to a core layer of the waveguide. In one example, the waveguide may contain one or more taper regions such that the light beam exits the waveguide and propagates out-of-the-plane of the waveguide into an out-coupling medium at a propagation angle. In one example, the waveguide may contain one or more electrodes onto which one or more voltages may be applied. The magnitude of the propagation angle may be electronically controlled by altered by controlling or altering the magnitude of the one or more applied voltages.

Abstract: A substantially planar waveguide for dynamically controlling the out-of-plane angle at which a light beam exits the waveguide. Generally, liquid crystal materials may be disposed within a waveguide in a cladding proximate or adjacent to a core layer of the waveguide. In one example, the waveguide may contain one or more taper regions such that the light beam exits the waveguide and propagates out-of-the-plane of the waveguide into an out-coupling medium at a propagation angle. In one example, the waveguide may contain one or more electrodes onto which one or more voltages may be applied. The magnitude of the propagation angle may be electronically controlled by stored by controlling or altering the magnitude of the one or more applied voltages.

Abstract: A substantially planar waveguide for dynamically controlling the out-of-plane angle at which a light beam exits the waveguide. Generally, liquid crystal materials may be disposed within a waveguide in a cladding proximate or adjacent to a core layer of the waveguide. In one example, the waveguide may contain one or more taper regions such that the light beam exits the waveguide and propagates out-of-the-plane of the waveguide into an out-coupling medium at a propagation angle. In one example, the waveguide may contain one or more electrodes onto which one or more voltages may be applied. The magnitude of the propagation angle may be electronically controlled by altered by controlling or altering the magnitude of the one or more applied voltages.

Abstract: A system for hardware error-correcting code (ECC) detection or correction of a received codeword from an original codeword includes an error-detecting circuit configured to process a selection of symbols of the received codeword using a set of factors, the original codeword being recomputable from a corresponding said selection of symbols of the original codeword using the set of factors. The error-detecting circuit includes a hardware multiplier and accumulator configured to use the set of factors and the selection of symbols of the received codeword to recompute remaining symbols of the original codeword, and a hardware comparator configured to compare the recomputed remaining symbols of the original codeword with corresponding said remaining symbols of the received codeword and to output first results of this comparison.

Abstract: A system for software error-correcting code (ECC) protection or compression of original data using ECC data in a first memory is provided. The system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The software ECC protection or compression includes: a data matrix for holding the original data in the first memory; a check matrix for holding the ECC data in the first memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the ECC data; and a thread for executing on the processing core. The thread includes a Galois Field multiplier for multiplying entries of the data matrix by an entry of the encoding matrix, and a sequencer for ordering operations using the Galois Field multiplier to generate the ECC data.

Abstract: A system for hardware error-correcting code (ECC) detection or correction of a received codeword from an original codeword includes an error-detecting circuit configured to process a selection of symbols of the received codeword using a set of factors, the original codeword being recomputable from a corresponding said selection of symbols of the original codeword using the set of factors. The error-detecting circuit includes a hardware multiplier and accumulator configured to use the set of factors and the selection of symbols of the received codeword to recompute remaining symbols of the original codeword, and a hardware comparator configured to compare the recomputed remaining symbols of the original codeword with corresponding said remaining symbols of the received codeword and to output first results of this comparison.

Abstract: A substantially planar waveguide for controlling the out-of-plane angle at which a light beam exits the waveguide. Generally, liquid crystal materials may be disposed within a waveguide in a cladding proximate or adjacent to a core layer of the waveguide. In one example, the waveguide may contain one or more taper regions such that the light beam exits the waveguide and propagates out-of-the-plane of the waveguide into an out-coupling medium at a propagation angle. In one example, the waveguide may contain one or more electrodes onto which one or more voltages may be applied. The magnitude of the propagation angle may be electronically controlled by altered by controlling or altering the magnitude of the one or more applied voltages.

Abstract: A substantially planar waveguide for dynamically controlling the out-of-plane angle at which a light beam exits the waveguide. Generally, liquid crystal materials may be disposed within a waveguide in a cladding proximate or adjacent to a core layer of the waveguide. In one example, the waveguide may contain one or more taper regions such that the light beam exits the waveguide and propagates out-of-the-plane of the waveguide into an out-coupling medium at a propagation angle. In one example, the waveguide may contain one or more electrodes onto which one or more voltages may be applied. The magnitude of the propagation angle may be electronically controlled by altered by controlling or altering the magnitude of the one or more applied voltages.

Abstract: A substantially planar waveguide for dynamically controlling the out-of-plane angle at which a light beam exits the waveguide. Generally, liquid crystal materials may be disposed within a waveguide in a cladding proximate or adjacent to a core layer of the waveguide. In one example, the waveguide may contain one or more taper regions such that the light beam exits the waveguide and propagates out-of-the-plane of the waveguide into an out-coupling medium at a propagation angle. In one example, the waveguide may contain one or more electrodes onto which one or more voltages may be applied. The magnitude of the propagation angle may be electronically controlled by stored by controlling or altering the magnitude of the one or more applied voltages.

Abstract: A system for software error-correcting code (ECC) protection or compression of original data using ECC data in a first memory is provided. The system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The software ECC protection or compression includes: a data matrix for holding the original data in the first memory; a check matrix for holding the ECC data in the first memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the ECC data; and a thread for executing on the processing core. The thread includes a Galois Field multiplier for multiplying entries of the data matrix by an entry of the encoding matrix, and a sequencer for ordering operations using the Galois Field multiplier to generate the ECC data.

Abstract: An accelerated erasure coding system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The processing core, storage medium, and computer instructions are configured to implement an erasure coding system, which includes: a data matrix for holding original data in the main memory; a check matrix for holding check data in the main memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the check data; and a thread for executing on the processing core. The thread includes: a parallel multiplier for concurrently multiplying multiple entries of the data matrix by a single entry of the encoding matrix; and a first sequencer for ordering operations through the data matrix and the encoding matrix using the parallel multiplier to generate the check data.

Abstract: An accelerated erasure coding system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The processing core, storage medium, and computer instructions are configured to implement an erasure coding system, which includes: a data matrix for holding original data in the main memory; a check matrix for holding check data in the main memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the check data; and a thread for executing on the processing core. The thread includes: a parallel multiplier for concurrently multiplying multiple entries of the data matrix by a single entry of the encoding matrix; and a first sequencer for ordering operations through the data matrix and the encoding matrix using the parallel multiplier to generate the check data.

Abstract: A substantially planar waveguide for dynamically controlling the out-of-plane angle at which a light beam exits the waveguide. Generally, liquid crystal materials may be disposed within a waveguide in a cladding proximate or adjacent to a core layer of the waveguide. In one example, the waveguide may contain one or more taper regions such that the light beam exits the waveguide and propagates out-of-the-plane of the waveguide into an out-coupling medium at a propagation angle. In one example, the waveguide may contain one or more electrodes onto which one or more voltages may be applied. The magnitude of the propagation angle may be electronically controlled by altered by controlling or altering the magnitude of the one or more applied voltages.

Abstract: A system for hardware error-correcting code (ECC) detection or correction of a received codeword from an original codeword includes an error-detecting circuit configured to process a selection of symbols of the received codeword using a set of factors, the original codeword being recomputable from a corresponding said selection of symbols of the original codeword using the set of factors. The error-detecting circuit includes a hardware multiplier and accumulator configured to use the set of factors and the selection of symbols of the received codeword to recompute remaining symbols of the original codeword, and a hardware comparator configured to compare the recomputed remaining symbols of the original codeword with corresponding said remaining symbols of the received codeword and to output first results of this comparison.

Abstract: An accelerated erasure coding system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The processing core, storage medium, and computer instructions are configured to implement an erasure coding system, which includes: a data matrix for holding original data in the main memory; a check matrix for holding check data in the main memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the check data; and a thread for executing on the processing core. The thread includes: a parallel multiplier for concurrently multiplying multiple entries of the data matrix by a single entry of the encoding matrix; and a first sequencer for ordering operations through the data matrix and the encoding matrix using the parallel multiplier to generate the check data.

Abstract: A system for software error-correcting code (ECC) protection or compression of original data using ECC data in a first memory is provided. The system includes a processing core for executing computer instructions and accessing data from a main memory, and a non-volatile storage medium for storing the computer instructions. The software ECC protection or compression includes: a data matrix for holding the original data in the first memory; a check matrix for holding the ECC data in the first memory; an encoding matrix for holding first factors in the main memory, the first factors being for encoding the original data into the ECC data; and a thread for executing on the processing core. The thread includes a Galois Field multiplier for multiplying entries of the data matrix by an entry of the encoding matrix, and a sequencer for ordering operations using the Galois Field multiplier to generate the ECC data.