Abstract: A coated substrate comprising a coating extending over at least a part of the substrate. The coating is obtainable from a coating composition comprising (a) a polymeric binder; and (b) a feathering reducing agent comprising a carboxylic acid reactive functional group. The coated portion of the substrate comprises a pretreatment layer. The pretreatment layer is obtainable from a pretreatment composition that comprises a trivalent chromium compound. The invention extends to a method of coating a pre-treated substrate and a coated package, such as a metal can.

Abstract: A coating composition comprising (a) a polyester binder material; and (b) a feathering reducing agent. The feathering reducing agent is selected from (i) an acrylic feathering reducing agent comprising a functional group selected from hydroxyl, epoxide, phosphatized epoxide and/or acid-functional; (ii) a hydroxy-functional polyester feathering reducing agent; (iii) a feathering reducing agent comprising a functional group selected from amine, amide, imine and/or nitrile; (iv) a phosphatized epoxy feathering reducing agent; (v) a phenolic resin feathering reducing agent; and/or (vi) a feathering reducing agent comprising an oxazolyl functional group. The invention extends to a substrate coated with the coating composition and use of the coating composition to reduce feathering.

Abstract: An apparatus and method of running multiple concurrent virtual machines is disclosed. A memory component, a timer component, a multiple virtual machine control component, and a processor component can be included. The timer component can include a virtual machine activation period timer and a plurality of virtual machine dedicated timers. The processor component can process instructions of a virtual machine indicated to be the active virtual machine. The processor component can suspend processing instructions of a virtual machine when the virtual machine activation period timer causes the timer component to indicate a virtual machine switch. A memory protection component and process can also be included.

Abstract: An interrupt management system for a multiple virtual machine environment is disclosed. In a system concurrently running a plurality of independent virtual machines, each virtual machine has associated therewith a plurality of anticipated interrupt signal types. A plurality of interrupt signals can be received in such a system. The interrupt signal having the highest priority is determined and that interrupt can be serviced.

Abstract: An improved system for concurrently running multiple virtual machines on a single processor. Each virtual machine being activated only during an assigned time slice or partition so as to isolate each of the concurrently running virtual machines from each other. The system having a power management mode and/or a partition reassignment mode. The power management feature placing the processor into a reduced power mode when a particular virtual machine has nothing to do during its assigned partition. In one embodiment, when an application has not been loaded into a given virtual machine, the processor is placed into a reduced power mode during the partition assigned to the given virtual machine. In one embodiment, the virtual machine is a JAVA Virtual Machine.

Abstract: Multiple Java Virtual Machines (JVMs) operate on a single direct execution JAVA processor with each JVM operating in a separate time slice called a partition. Each JVM has its own data and control structures and is assigned a fixed area of memory. Each partition is also allotted a fixed period of time in which to operate, and, at the end of the allotted time, a context switch is forced to another JVM operating in the next partition. The context switch does not transfer control directly from one JVM to another JVM. Instead, at the end of a partition time period control is switched from the currently operating JVM to a “master JVM” during a time period called an “interstice.” The master JVM handles system interrupts and housekeeping duties. At the end of the interstice time period, the master JVM starts a proxy thread associated with the next JVM to become operational. The proxy thread handles JVM-specific interrupts and checks the status of the associated JVM.

Abstract: An improved computer architecture and system advantageously combine the beneficial characteristics of a high level object oriented programming language with an optimized processor for efficient application to real time embedded computing problems. Additionally, an improved method for resolving symbolic references in code generated by compiling source code written in an object oriented programming language to the corresponding logical memory addresses stores look-up information with the object itself after the first encounter of a given symbolic reference, whereby the logical memory address information is available for subsequent encounters of the symbolic reference, and whereby no modification of the program instructions containing the symbolic reference is necessary. In a preferred embodiment, the Java™ programming language is used.