Abstract: The present invention relates to pulverulent aluminium alloys having Cu, Zn or Si/Mg as the most relevant alloying element, the alloy further having a content of 1 to 15 wt. % of metals selected from the group M1 comprising Mo, Nb, Zr, Fe, Ti, Ta, V, and lanthanides. Such aluminium alloys can be used in additive manufacturing processes such as selective laser melting for the production of high-strength and hot-crack-free three-dimensional objects. The present invention further relates to methods and devices for producing three-dimensional objects from such aluminium alloys, methods for producing such pulverulent aluminium alloys, three-dimensional objects also produced from such pulverulent aluminium alloys, and specific aluminium alloys.

Abstract: The present invention relates to aluminium alloys in powder form having a content of at least two elements M from the group comprising Cr, Fe, Ni and Co and at least one element N from the group comprising Ti, Y and Ce, the alloy having a total amount of elements M in the range of 1 to 16 wt %, a total amount of elements N in the range of 0.5 to 5 wt % if the aluminium alloy contains Ti or Ce, and 1 to 10 wt %, if the aluminium alloy contains Y. Such aluminium alloys can be used in additive manufacturing processes, such as selective laser melting, to produce high-strength three-dimensional objects which can be used, for example, in engines for automobiles. The present invention further relates to processes and apparatuses for manufacturing three-dimensional objects from such aluminium alloys, processes for manufacturing such aluminium alloys in powder form, three-dimensional objects manufactured from such aluminium alloys in powder form, and specific aluminium alloys.

Abstract: The invention relates to a production device for additively manufacturing three-dimensional components by the layer-by-layer application of a construction material by means of at least one coating unit and spatially selective solidification of a construction material by means of at least one irradiation unit, comprising a process chamber having at least one heat-reflecting apparatus, in particular heat-reflecting layer, which shields at least one portion of a surface within the process chamber.

Abstract: A data processing device includes one or more state registers to store state information associated with an execution core of the device. Each state register includes an associated “dirty” bit. When a guest program is executed at the execution core, a dirty bit is set in response to a change in the state information at the associated state register. In response to a world switch from the guest program to a VMM, the state information at each state register is stored to memory only if the associated dirty bit is set. In addition, if the VMM changes any stored state information, it clears a “clean” bit associated with the changed information. In response to a world switch from the VMM to a guest, the state information associated with cleared clean bits is retrieved from memory.

Abstract: A fuel injection valve for arrangement in a combustion chamber (40) of an internal combustion engine has a nozzle support with a nozzle body (30) disposed thereon in fixed fashion by way of a nozzle clamping nut (20), the nozzle body designed to protrude into the combustion chamber (40) and being provided for holding a nozzle needle, and at least one annular combustion chamber sealing element (50) with an upper support surface (60) facing the nozzle clamping nut (20) and a lower support surface (70) facing the combustion chamber (40), the lower surface surrounding the nozzle body (30) and being provided for sealing the nozzle support off from the combustion chamber (40). At least one additional sealing element (80) is provided for sealing the nozzle body (30) in the area of the nozzle clamping nut (20).

Abstract: A fuel injection valve for arrangement in a combustion chamber (40) of an internal combustion engine has a nozzle support with a nozzle body (30) disposed thereon in fixed fashion by way of a nozzle clamping nut (20), the nozzle body designed to protrude into the combustion chamber (40) and being provided for holding a nozzle needle, and at least one annular combustion chamber sealing element (50) with an upper support surface (60) facing the nozzle clamping nut (20) and a lower support surface (70) facing the combustion chamber (40), the lower surface surrounding the nozzle body (30) and being provided for sealing the nozzle support off from the combustion chamber (40). At least one additional sealing element (80) is provided for sealing the nozzle body (30) in the area of the nozzle clamping nut (20).

Abstract: In one embodiment, a system comprises one or more input/output (I/O) devices; an I/O memory management unit (IOMMU) coupled to receive memory requests sourced by the I/O devices and configured to provide address translation for the memory requests; and a virtual machine monitor (VMM) configured to manage one or more virtual machines on the system, wherein the VMM is configured to virtualize the IOMMU, providing one or more virtual IOMMUs for use by one or more virtual machines.

Abstract: A data processing device includes one or more state registers to store state information associated with an execution core of the device. Each state register includes an associated “dirty” bit. When a guest program is executed at the execution core, a dirty bit is set in response to a change in the state information at the associated state register. In response to a world switch from the guest program to a VMM, the state information at each state register is stored to memory only if the associated dirty bit is set. In addition, if the VMM changes any stored state information, it clears a “clean” bit associated with the changed information. In response to a world switch from the VMM to a guest, the state information associated with cleared clean bits is retrieved from memory.

Abstract: In an embodiment, an input/output (I/O) memory management unit (IOMMU) comprises at least one memory configured to store translation data; and control logic coupled to the memory and configured to translate an I/O device-generated memory request using the translation data. The translation data corresponds to one or more device table entries in a device table stored in a memory system of a computer system that includes the IOMMU, wherein the device table entry for a given request is selected by an identifier corresponding to the I/O device that generates the request. The translation data further corresponds to one or more I/O page tables, wherein the selected device table entry for the given request includes a pointer to a set of I/O page tables to be used to translate the given request.

Abstract: In an embodiment, an input/output (I/O) memory management unit (IOMMU) comprises at least one memory configured to store translation data; and control logic coupled to the memory and configured to translate an I/O device-generated memory request using the translation data. The translation data corresponds to one or more device table entries in a device table stored in a memory system of a computer system that includes the IOMMU, wherein the device table entry for a given request is selected by an identifier corresponding to the I/O device that generates the request. The translation data further corresponds to one or more I/O page tables, wherein the selected device table entry for the given request includes a pointer to a set of I/O page tables to be used to translate the given request.

Abstract: In an embodiment, an input/output (I/O) memory management unit (IOMMU) comprises at least one memory configured to store translation data; and control logic coupled to the memory and configured to translate an I/O device-generated memory request using the translation data. The translation data corresponds to one or more device table entries in a device table stored in a memory system of a computer system that includes the IOMMU, wherein the device table entry for a given request is selected by an identifier corresponding to the I/O device that generates the request. The translation data further corresponds to one or more I/O page tables, wherein the selected device table entry for the given request includes a pointer to a set of I/O page tables to be used to translate the given request.

Abstract: In one embodiment, a system comprises one or more input/output (I/O) devices; an I/O memory management unit (IOMMU) coupled to receive memory requests sourced by the I/O devices and configured to provide address translation for the memory requests; and a virtual machine monitor (VMM) configured to manage one or more virtual machines on the system, wherein the VMM is configured to virtualize the IOMMU, providing one or more virtual IOMMUs for use by one or more virtual machines.

Abstract: In one embodiment, a system comprises one or more input/output (I/O) devices; an I/O memory management unit (IOMMU) coupled to receive memory requests sourced by the I/O devices and configured to provide address translation for the memory requests; and a virtual machine monitor (VMM) configured to manage one or more virtual machines on the system, wherein the VMM is configured to virtualize the IOMMU, providing one or more virtual IOMMUs for use by one or more virtual machines.

Abstract: In one embodiment, an input/output (I/O) node comprises an I/O memory management unit (IOMMU) configured to translate memory requests. The I/O node is configured to couple to an interconnect and to operate as a tunnel on the interconnect, and wherein the IOMMU is configured translate memory requests passing through the tunnel in the upstream direction. In another embodiment, a system comprises another I/O node configured to bridge another interconnect to the interconnect, wherein the I/O node is the tunnel for the other I/O node.

Abstract: In an embodiment, an input/output (I/O) memory management unit (IOMMU) comprises at least one memory configured to store translation data; and control logic coupled to the memory and configured to translate an I/O device-generated memory request using the translation data. The translation data corresponds to one or more device table entries in a device table stored in a memory system of a computer system that includes the IOMMU, wherein the device table entry for a given request is selected by an identifier corresponding to the I/O device that generates the request. The translation data further corresponds to one or more I/O page tables, wherein the selected device table entry for the given request includes a pointer to a set of I/O page tables to be used to translate the given request.

Abstract: In one embodiment, an input/output (I/O) node comprises an I/O memory management unit (IOMMU) configured to translate memory requests. The I/O node is configured to couple to an interconnect and to operate as a tunnel on the interconnect, and wherein the IOMMU is configured translate memory requests passing through the tunnel in the upstream direction. In another embodiment, a system comprises another I/O node configured to bridge another interconnect to the interconnect, wherein the I/O node is the tunnel for the other I/O node.

Abstract: In one embodiment, a system comprises one or more input/output (I/O) devices; an I/O memory management unit (IOMMU) coupled to receive memory requests sourced by the I/O devices and configured to provide address translation for the memory requests; and a virtual machine monitor (VMM) configured to manage one or more virtual machines on the system, wherein the VMM is configured to virtualize the IOMMU, providing one or more virtual IOMMUs for use by one or more virtual machines.

Abstract: In an embodiment, an input/output memory management unit (IOMMU) is configured to receive a completion wait command defined to ensure that one or more preceding invalidation commands are completed by the IOMMU prior to a completion of the completion wait command. The IOMMU is configured to respond to the completion wait command by delaying completion of the completion wait command until: (1) a read response corresponding to each outstanding memory read operation that depends on a translation entry that is invalidated by the preceding invalidation commands is received; and (2) the control unit transmits one or more operations upstream to ensure that each memory write operation that depends on the translation table entry that is invalidated by the preceding invalidation commands has at least reached a bridge to a coherent fabric in the computer system and has become visible to the system.

Abstract: In an embodiment, a computer system comprises a processor; a memory management module comprising a plurality of instructions executable on the processor; a memory coupled to the processor; and an input/output memory management unit (IOMMU) coupled to the memory. The IOMMU is configured to implement address translation and memory protection for memory operations sourced by one or more input/output (I/O) devices. The memory stores a command queue during use. The memory management module is configured to write one or more control commands to the command queue, and the IOMMU is configured to read the control commands from the command queue and execute the control commands.

Abstract: In one embodiment, an input/output memory management unit (IOMMU) comprises a cache to cache translation data from memory; and a control unit coupled to the cache. The control unit is configured to implement address translation and memory protection for memory requests sourced by one or more input/output (I/O) devices. The memory requests sourced by the I/O devices travel in one or more first virtual channels, and the control unit is configured to transmit memory requests sourced by the control unit in at least a second virtual channel separate from the first virtual channels.