Patents by Inventor Michael Henry Kass

Michael Henry Kass has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11126559
    Abstract: A memory system implements any combination of zero or more cache eviction policies, zero or more cache prefetch policies, and zero or more virtual address modification policies. A memory allocation technique implements parameter receiving and processing in accordance with the cache eviction policies, the cache prefetch policies, and the virtual address modification policies. A compiler system optionally processes any combination of zero or more indicators of extended data types usable to indicate one or more of the cache eviction policies, the cache prefetch policies, and/or the virtual address modification policies to associate with a variable, an array of variables, and/or a section of memory. The indicators comprise any combination of zero or more compiler flags, zero or more compiler switches, and/or zero or more pseudo-keywords in source code.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: September 21, 2021
    Inventor: Michael Henry Kass
  • Publication number: 20190236018
    Abstract: A memory system implements any combination of zero or more cache eviction policies, zero or more cache prefetch policies, and zero or more virtual address modification policies. A memory allocation technique implements parameter receiving and processing in accordance with the cache eviction policies, the cache prefetch policies, and the virtual address modification policies. A compiler system optionally processes any combination of zero or more indicators of extended data types usable to indicate one or more of the cache eviction policies, the cache prefetch policies, and/or the virtual address modification policies to associate with a variable, an array of variables, and/or a section of memory. The indicators comprise any combination of zero or more compiler flags, zero or more compiler switches, and/or zero or more pseudo-keywords in source code.
    Type: Application
    Filed: February 19, 2019
    Publication date: August 1, 2019
    Inventor: Michael Henry Kass
  • Patent number: 10216632
    Abstract: A memory system implements a plurality of cache eviction policies and optionally a plurality of virtual address modification policies. A cache storage unit of the memory system has a plurality of cache storage sub-units. The cache storage unit is optionally managed by a cache management unit in accordance with the cache eviction polices. The cache storage sub-units are allocated for retention of information associated with respective memory addresses and are associated with the cache eviction policies in accordance with the respective memory addresses. For example, in response to a reference to an address that misses in a cache, the address is used to access a page table entry having an indicator specifying an eviction policy to use when selecting a cache line from the cache to evict in association with allocating a cache line of the cache to retain data obtained via the address.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: February 26, 2019
    Inventor: Michael Henry Kass
  • Patent number: 10002080
    Abstract: A memory system implements a plurality of virtual address modification policies and optionally a plurality of cache eviction policies. Virtual addresses are optionally, selectively, and/or conditionally modified by the memory system in accordance with a plurality of virtual address modification policies. The virtual address modification policies include no modification, modification according to two-dimensional Morton ordering, and modification according to three-dimensional Morton ordering. For example, in response to a reference to a particular virtual address, the particular virtual address is modified according to two-dimensional Morton ordering so that at least two elements in a same column and distinct respective rows of a two-dimensional data structure are loaded into a same cache line and/or are referenced via a same page table entry.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: June 19, 2018
    Inventor: Michael Henry Kass
  • Patent number: 9514053
    Abstract: A memory system implements a plurality of cache eviction policies, a plurality of virtual address modification policies, or both. One or more application programming interfaces provide access to memory allocation and parameters thereof relating to zero or more cache eviction policies and/or zero or more virtual address modification policies associated with memory received via a memory allocation request. The provided application programming interfaces are usable by various software elements, such as any one or more of basic input/output system, driver, operating system, hypervisor, and application software elements. Memory allocated via the application programming interfaces is optionally managed via one or more heaps, such as one heap per unique combination of values for each of any one or more parameters including eviction policy, virtual address modification policy, structure-size, and element-size parameters.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: December 6, 2016
    Inventor: Michael Henry Kass
  • Publication number: 20150186286
    Abstract: A memory system implements a plurality of cache eviction policies, a plurality of virtual address modification policies, or both. One or more application programming interfaces provide access to memory allocation and parameters thereof relating to zero or more cache eviction policies and/or zero or more virtual address modification policies associated with memory received via a memory allocation request. The provided application programming interfaces are usable by various software elements, such as any one or more of basic input/output system, driver, operating system, hypervisor, and application software elements. Memory allocated via the application programming interfaces is optionally managed via one or more heaps, such as one heap per unique combination of values for each of any one or more parameters including eviction policy, virtual address modification policy, structure-size, and element-size parameters.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 2, 2015
    Inventor: Michael Henry Kass
  • Publication number: 20150186287
    Abstract: A memory system implements a plurality of cache eviction policies, a plurality of virtual address modification policies, or both. One or more application programming interfaces are used for memory allocation via parameters thereof relating to zero or more cache eviction policies and/or zero or more virtual address modification policies associated with memory received via a memory allocation request. The application programming interfaces are usable by various software elements, such as any one or more of basic input/output system, driver, operating system, hypervisor, and application software elements. Memory allocated via the application programming interfaces is optionally managed via one or more heaps, such as one heap per unique combination of values for each of any one or more parameters including eviction policy, virtual address modification policy, structure-size, and element-size parameters.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 2, 2015
    Inventor: Michael Henry Kass
  • Publication number: 20150186274
    Abstract: A memory system implements a plurality of cache eviction policies and optionally a plurality of virtual address modification policies. A cache storage unit of the memory system has a plurality of cache storage sub-units. The cache storage unit is optionally managed by a cache management unit in accordance with the cache eviction polices. The cache storage sub-units are allocated for retention of information associated with respective memory addresses and are associated with the cache eviction policies in accordance with the respective memory addresses. For example, in response to a reference to an address that misses in a cache, the address is used to access a page table entry having an indicator specifying an eviction policy to use when selecting a cache line from the cache to evict in association with allocating a cache line of the cache to retain data obtained via the address.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 2, 2015
    Inventor: Michael Henry Kass
  • Publication number: 20150186271
    Abstract: A memory system implements a plurality of virtual address modification policies and optionally a plurality of cache eviction policies. Virtual addresses are optionally, selectively, and/or conditionally modified by the memory system in accordance with a plurality of virtual address modification policies. The virtual address modification policies include no modification, modification according to two-dimensional Morton ordering, and modification according to three-dimensional Morton ordering. For example, in response to a reference to a particular virtual address, the particular virtual address is modified according to two-dimensional Morton ordering so that at least two elements in a same column and distinct respective rows of a two-dimensional data structure are loaded into a same cache line and/or are referenced via a same page table entry.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 2, 2015
    Inventor: Michael Henry Kass